REV. C
AD8011
–13–
INCREASING BW AT HIGH GAINS
As presented previously, for a fixed R
F
(feedback gain setting
resistor), the AD8011 CLBW will decrease as R
N
is reduced
(increased G). This effect can be minimized by simply reducing
R
F
and partially restoring the devices optimized BW for gains
greater than +2/–1. Note that the AD8011 is ac optimized (high
BW and low peaking) for A
V
= +2/–1 and R
F
= 1 kΩ. Using this
optimized G as a reference and the previous V
O
(s) equations,
the following relationships result: R
F
= 1kΩ + 2 – G/2 gm for
G = 1+ R
F
/R
N
(noninverting) or R
F
= 1kΩ + G + 1/2 gm for
G = –R
F
/R
N
(inverting).
Using 1/2 gm equal to 120 Ω results in a R
F
of 500 Ω for G =
+5/–4 and a corresponding R
N
of 125 Ω. This will extend the
AD8011’s BW to near its optimum design value of typically
180 MHz at R
L
= 1 kΩ. In general, for gains greater than +7/–6,
R
F
should not be reduced to values much below 400 Ω or else ac
peaking can result. Using this R
F
value as the lower limit will
result in BW restoration near its optimized value to the upper G
values specified. Gains greater than about +7/–6 will result in
CLBW reduction. The derivations above are just approximations.
DRIVING A SINGLE-SUPPLY A/D CONVERTER
New CMOS A/D converters are placing greater demands on the
amplifiers that drive them. Higher re solutions, faster conversion
rates, and input switching irregularities require superior settling
characteristics. In addition, these devices run off a single 5 V supply
and consume little power, so good single-supply operation with
low power consumption are very important. The AD8011 is
well positioned for driving this new class of A/D converters.
Figure 14 shows a circuit that uses an AD8011 to drive an AD876,
a single-supply, 10-bit, 20 MSPS A/D converter that requires
only 140 mW. Using the AD8011 for level shifting and driving,
the A/D exhibits no degradation in performance compared to
when it is driven from a signal generator.
3.6V
1.6V
AD8011
+5V
10F
R2
1k⍀
R3
1.65k⍀
R1
499k⍀
3.6V
V
IN
50⍀
0.1F
1.6V
1V
0V
100⍀
AD876
+1.6V
+3.6V
REFT
REFB
0.1F
0.1F
Figure 14. AD8011 Driving the AD876
The analog input of the AD876 spans 2 V centered at about
2.6 V. The resistor network and bias voltages provide the level
shifting and gain required to convert the 0 V to 1 V input signal
to a 3.6 V to 1.6 V range that the AD876 wants to see.
Biasing the noninverting input of the AD8011 at 1.6 V dc forces
the inverting input to be at 1.6 V dc for linear operation of the
amplifier. When the input is at 0 V, there is 3.2 mA flowing out of
the summing junction via R1 (1.6 V/499 Ω). R3 has a current of
1.2 mA flowing into the summing junction (3.6 V – 1.6 V)/1.65 kΩ.
The difference of these two currents (2 mA) must flow through
R2. This current flows toward the summing junction and
requires that the output be 2 V higher than the summing junction
or at 3.6 V.
When the input is at 1 V, there is 1.2 mA flowing into the sum-
ming junction through R3 and 1.2 mA flowing out through R1.
These currents balance and leave no current to flow through R2.
Thus, the output is at the same potential as the inverting input
or 1.6 V.
The input of the AD876 has a series MOSFET switch that turns
on and off at the sampling rate. This MOSFET is connected to a
hold capacitor, internal to the device. The on impedance of the
MOSFET is about 50 Ω, while the hold capacitor is about 5 pF.
In a worst-case condition, the input voltage to the AD876 will
change by a full-scale value (2 V) in one sampling cycle. When
the input MOSFET turns on, the output of the op amp will be
connected to the charged hold capacitor through the series resis-
tance of the MOSFET. Without any other series resistance, the
instantaneous current that flows would be 40 mA. This would
cause settling problems for the op amp.
The series 100 Ω resistor limits the current that flows instantane-
ously to about 13 mA after the MOSFET turns on. This resistor
cannot be made too large or the high frequency performance
will be affected.
The sampling MOSFET of the AD876 is closed for only half of
each cycle or for 25 ns. Approximately seven time constants are
required for settling to 10 bits. The series 100 Ω resistor, the
50 Ω on resistance, and the hold capacitor create a 750 ps time
constant. These values leave a comfortable margin for settling.
Obtaining the same results with the op amp A/D combination
as compared to driving with a signal generator indicates that the
op amp is settling fast enough.
Overall, the AD8011 provides adequate buffering for the AD876
A/D converter without introducing distortion greater than that
of the A/D converter by itself.
