LTC4259A-1
28
4259a1fa
LOGIC LEVEL SUPPLY
In additon to the 48V used to source power to each port,
a logic level supply is required to power the digital portion
of the LTC4259A-1. To simplify design and meet voltage
isolation requirements, the logic level supply can be
generated from the isolated –48V supply. Figure 21
shows an example method using an LT
®
1619 to control
a –48V to 3.3V current mode supply. This boost con-
verter topology uses the LT1619 current mode controller
and a current mirror which reflects the 3.3V output
voltage to the –48V rail, improving the regulation toler-
ance over the more traditional large resistor voltage
divider. This approach achieves high accuracy with a
transformerless design.
IEEE 802.3af COMPLIANCE AND EXTERNAL
COMPONENT SELECTION
The LTC4259A-1 is designed to control power delivery in
IEEE 802.3af compliant Power Sourcing Equipment (PSE).
Because proper operation of the LTC4259A-1 may depend
on external signals and power sources, like the –48V
supply (V
EE
) or the OSCIN oscillator source, external
components such as the sense resistors (R
S
), and possi-
bly software running on an external microprocessor,
using the LTC4259A-1 in a PSE does not guarantee
802.3af compliance. Using an LTC4259A-1 does get you
most of the way there. This section discusses the rest of
the elements that go along with the LTC4259A-1 to make
an 802.3af compliant PSE. Each paragraph below ad-
dresses a component which is critical for PSE compliance
as well as possible pitfalls that can cause a PSE to be
noncompliant. For further assistance please contact Lin-
ear Technology’s Applications department.
Sense Resistors
The LTC4259A-1 is designed to use a 0.5 sense resistor,
R
S
, to monitor the current through each port. The value of
the sense resistor has been minimized in order to reduce
power loss and as a consequence, the voltage which the
LTC4259A-1 must measure is small. Each port may be
drawing up to 450mA with this current flowing through the
sense resistor and associated circuit board traces. To
prevent parasitic resistance on the circuit board from
obscuring the voltage drop across the sense resistor, the
LTC4259A-1 must Kelvin sense the resistor voltage. One
way to achieve Kelvin sensing is “star grounding,” shown
pictorially in Figure 1. Another option is to use a –48V
power plane to connect the sense resistor and the
LTC4259A-1 V
EE
pin. Either of these strategies will prevent
voltages developed across parasitic circuit board resis-
tances from affecting the LTC4259A-1 current measure-
ment accuracy. The precision of the sense resistor directly
affects the measurement of the IEEE parameters I
INRUSH
,
APPLICATIO S I FOR ATIO
WUUU
DRV
100
100µH
4.7µH
B1100
10µF
16V
4700pF
100pF
CMPZ4702B
ISOLATED
GND
ISOLATED
48V
Si2328DS
FMMT593
FMMT593
876
5
2
341
GATEV
IN
V
C
S/S
SENSE
LT1619
FB
GND
Si2328DS
510
47k
3.32k
1%
0.100
1%
1W
1.24k
1%
100k
4259A F21
910k
1µF
100V
+
V
EE
10
47µF
10V
V
DD
3.3V
300mA
+
47µF
10V
ISOLATED
GND
+
Figure 21. –48V to 3.3V Boost Converter
LTC4259A-1
29
4259a1fa
APPLICATIO S I FOR ATIO
WUUU
I
LIM
, I
CUT
and I
MIN
. Therefore, to maintain IEEE compli-
ance, use a resistor with 0.5% or better accuracy.
Power MOSFETs
The LTC4259A-1 controls power MOSFETs in order to
regulate current flow through the Ethernet ports. Under
certain conditions these MOSFETs have to dissipate sig-
nificant power. See the Choosing External MOSFETs sec-
tion for a detailed discussion of the requirements these
devices must meet.
Common Mode Chokes
Both nonpowered and powered Ethernet connections
achieve best performance (for data transfer, power trans-
fer and EMI) when a common mode choke is used on each
port. In the name of cost reduction, some designs share a
common mode choke between two adjacent ports. Even
for nonpowered Ethernet, sharing a choke is not recom-
mended. With two ports passing through the choke, it
cannot limit the common mode current of either port.
Instead, the choke only controls the sum of both ports’
common mode current. Because cabling from the ports
generally connects to different devices up to 200m apart,
a current loop can form. In such a loop, common mode
current flows in one port and out the other, and the choke
will not prevent this because the sum of the currents is
zero. Another way to view this interaction between the
paired ports is that the choke acts as a transformer
coupling the ports’ common modes together. In
nonpowered Ethernet, common mode current results
from nonidealities like ground loops; it is not part of
normal operation. However, Power over Ethernet sends
power and hence significant current through the ports;
common mode current is a byproduct of normal opera-
tion. As described in the Choosing External MOSFETs
section and under the Power Supplies heading below,
large transients can occur when a port’s power is turned
on or off. When a powered port is shorted (see Surge
Suppressors and Circuit Protection), a port’s common
mode current may be excessive. Sharing a common mode
choke between two ports couples start-up, disconnect
and fault transients from one port to the other. The end
result can range from momentary noncompliance with
802.3af to intermittent behavior and even to excessive
voltages that may damage circuitry (in both the PSE and
PD) connected to the ports.
Detect, AC Blocking and Transient Suppressor Diodes
During detection and classification, the LTC4259A-1 senses
the port voltage through the detect diodes D
DET
in Fig-
ure 18. Excessive voltage drop across D
DET
will corrupt
the LTC4259A-1’s detect and classification results. Select
a diode for D
DET
that will have less than 0.7V of forward
drop at 0.4mA and less than 0.9V of forward drop at 50mA.
When the port is powered, the detect diode is reverse bi-
ased. Any leakage through the detect diode prevents the
LTC4259A-1 from sensing all the current coupled through
the C
DET
capacitor. At high temperature with 70V of reverse
bias, a typical switching diode like the 1N4148 may have
more than 50µA of leakage. Such leakage can interfere with
AC disconnect because it is a large fraction of the LTC4259A-
1’s I
ACDMIN
threshold. Using a low leakage detect diode like
the CMPD3003 is recommended.
The AC blocking diodes can interfere with AC disconnect
sensing if they become leaky. If the AC blocking diode (D
AC
in Figure 18) begins leaking, it contributes to the Ethernet
port impedance, potentially bringing the impedance low
enough to draw I
ACDMIN
from the DETECT pin and keep the
port powered. More likely, leakage through the AC block-
ing diode will cause shifts in the AC disconnect threshold
that are not large enough to make the PSE noncompliant.
Generally, diode leakage is caused by voltage or tempera-
ture stress. Diodes that are rated to 100V or more and can
handle dissipating at least 0.5W should be acceptable in
this application. Other component leakages can have a
similar affect on AC disconnect and even affect DC discon-
nect if the leakage becomes severe. Among components
to be wary of are the transient surge suppressors. The
devices shown in Figure 1 are rated for less than 5µA of
leakage at 58V. However there is a potential for stress
induced leakage, so healthy margins should be used when
selecting diodes for these applications.
Capacitors
Sizing of both the C
DET
and C
PSE
capacitors is critical to
proper operation of the LTC4259A-1’s AC disconnect sens-
ing. See the AC Disconnect section for more information.
LTC4259A-1
30
4259a1fa
Also, C
PSE
may be important to the voltage stability of a
powered port. Port voltage instability is generally not a
problem if V
EE
, the –48V supply, is well bypassed. For both
of these reasons be aware that many ceramic dielectrics
have dramatic DC voltage and temperature coefficients. A
0.22µF ceramic capacitor is often nowhere near 0.22µF
when operating at 50VDC or 100VDC. Use 100V or higher
rated X7R capacitors for C
DET
and C
PSE
as these have re-
duced voltage dependance while also being relatively small
and inexpensive.
Power Supplies
The LTC4259A-1 must be supplied with 3.3V (V
DD
) and
48V (V
EE
). Poor regulation on either of these supplies
can lead to noncompliance. The IEEE requires a PSE
output voltage between 44V and 57V. When the LTC4259A-
1 begins powering an Ethernet port, it controls the current
through the port to minimize disturbances on V
EE
. How-
ever, if the V
EE
supply is underdamped or otherwise
unstable, its voltage could go outside of the IEEE specified
limits, causing all ports in the PSE to be noncompliant.
This scenario can be even worse when a PD is unplugged
because the current can drop immediately to zero. In both
cases the port voltage must always stay between –44V
and –57V. In addition, the 802.3af specification places
specific ripple, noise and load regulation requirements on
the PSE. Among other things, disturbances on either V
DD
or V
EE
can adversely affect detection, classification and the
AC disconnection sensing. Proper bypassing and stability
of the V
DD
and V
EE
supplies is important.
Another problem that can affect the V
EE
supply is insuffi-
cient power, leading to the supply voltage drooping out of
the specified range. The 802.3af specification states that
if a PSE powers a PD it must be able to provide the
maximum power level requested by the PD based on the
APPLICATIO S I FOR ATIO
WUUU
PD’s classification. The specification does allow a PSE to
choose not to power a port because the PD requires more
power than the PSE has left to deliver. If a PSE is built with
a V
EE
supply capable of less than 15.4W • (number of
PSE’s Ethernet ports), it must implement a power alloca-
tion algorithm that prevents ports from being powered
when there is insufficient power. Because the specifica-
tion also requires the PSE to supply 400mA at up to a 5%
duty cycle, the V
EE
supply capability should be at least a
few percent more than the maximum total power the PSE
will supply to PDs. Finally, the LTC4259A-1s draw current
from V
EE
. If the V
DD
supply is generated from V
EE
, that
power divided by the switcher efficiency must also be
added to the V
EE
supply’s capability.
Fast V
EE
transients can damage the LTC4259A-1. Limit the
V
EE
slew rate to 50mV/µs. In most applications, existing
V
EE
bypass capacitors (described above) will cause the
V
EE
supply to slew much slower than 50mV/µs.
OSCIN Input
AC disconnect also relies on an oscillating signal applied
to the OSCIN pin. Requirements for this signal are pro-
vided in the OSCIN Input and Oscillator Requirements
section. Out-of-band noise on the OSCIN pin will disrupt
the LTC4259A-1’s ability to sense the absence of a PD. Any
noise present at the OSCIN pin is amplified by the
LTC4259A-1 and driven out of the DETECT pins (of pow-
ered ports with AC disconnect enabled). Due to the amount
of capacitance connected to the DETECT pins, driving this
noise can easily require more than I
ACDMIN
, tripping the
DETECT pin current sense and keeping the port powered.
During circuit board layout, keep wiring from the oscillator
to the OSCIN pin away from noise sources like digital clock
and data lines. A single-stage RC lowpass filter (shown in
Figure 22) will attenuate out-of-band noise.

LTC4259AIGW-1#TRPBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Power Switch ICs - POE / LAN 4x IEEE 802.3af Pwr over E Cntr w/ AC Di
Lifecycle:
New from this manufacturer.
Delivery:
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