© Semiconductor Components Industries, LLC, 2016
May, 2016 − Rev. 7
1 Publication Order Number:
NB3F8L3010C/D
NB3F8L3010C
3.3V / 2.5V / 1.8V / 1.5V
3:1:10 LVCMOS Fanout Buffer
Description
The NB3F8L3010C is a 3:1:10 Clock / Data fanout buffer operating
on a 3.3 V / 2.5 V Core V
DD
and two flexible 3.3 V / 2.5 V / 1.8 V /
1.5 V VDDO
n
supplies which must be equal or less than V
DD
.
A Mux selects between a Crystal input, or either of two
differential/SE Clock / Data inputs. Differential Inputs accept
LVPECL, LVDS, HCSL, or SSTL and Single−Ended levels. The
MUX control lines, SEL0 and SEL1, select CLK0/CLK0
,
CLK1/CLK1
, or Crystal input pins per Table 3. The Crystal input is
disabled when a Clock input is selected. Output enable pin, OE,
synchronously forces a High Impedance state (HZ) when Low per
Table 4.
Outputs consist of 10 single−ended LVCMOS outputs.
Features
• Ten CMOS / LVTTL Outputs up to 200 MHz
• Differential Inputs Accept LVPECL, LVDS, HCSL, or SSTL
• Crystal Oscillator Interface
• Crystal Input Frequency Range: 10 MHz to 50 MHz
• Output Skew: 10 ps Typical
• Additive RMS Phase Jitter @ 125 MHz, (12 kHz – 20 MHz): 0.03 ps
(Typical)
• Synchronous Output Enable
• Output Defined Level When Input is Floating
• Power Supply Modes:
♦ Single 3.3 V
♦ Single 2.5 V
♦ Mixed 3.3 V ± 5% Core/2.5 V ± 5% Output Operating Supply
♦ Mixed 3.3 V ± 5% Core/1.8 V ± 0.2 V Output Operating Supply
♦ Mixed 3.3 V ± 5% Core/1.5 V ± 0.15 V Output Operating Supply
♦ Mixed 2.5 V ± 5% Core/ 1.8 V ± 0.2 V Output Operating Supply
♦ Mixed 2.5 V ± 5% Core /1.5 V ± 0.15 V Output Operating Supply
• Two Separate Output Bank Power Supplies
• Industrial temp. range -40°C to 85°C
• These are Pb−Free Devices
Applications
• Clock Distribution
• Networking and Communications
• High End Computing
• Wireless and Wired Infrastructure
End Products
• Servers
• Ethernet Switch/Routers
• AT E
• Test and Measurement
MARKING
DIAGRAM
QFN32
G SUFFIX
CASE 488AM
www.onsemi.com
See detailed ordering and shipping information page 12 of this
data sheet.
ORDERING INFORMATION
A = Assembly Location
WL = Wafer Lot
YY = Year
WW = Work Week
G = Pb−Free Package
32
1
NB3F8L
3010C
AWLYYWWG
1
