85222AMI-02LF

DATASHEET
1-to-2, LVCMOS/LVTTL- To- Differential
HSTL Translator
ICS85222I-02
ICS85222AMI-02 APRIL 25, 2014 1 ©2014 Integrated Device Technology, Inc.
General Description
The ICS85222I-02 is a 1-to-2 LVCMOS / LVTTL-to- Differential HSTL
translator. The ICS85222I-02 has one single-ended clock input. The
single-ended clock input accepts LVCMOS or LVTTL input levels and
translates them to HSTL levels. The small outline 8-pin SOIC
package makes this device ideal for applications where space, high
performance and low power are important.
Features
Two differential HSTL outputs
One LVCMOS/LVTTL clock input
CLK input can accept the following input levels:
LVCMOS or LVTTL
Maximum output frequency: 350MHz
Part-to-part skew: 500ps (maximum)
Propagation delay: 1.55ns (maximum)
V
OH
: 1.4V (maximum)
Output crossover voltage: 0.5V - 0.9V
Full 3.3V operating supply voltage
-40°C to 85°C ambient operating temperature
Lead-free RoHS compliant packaging
Block Diagram Pin Assignment
ICS85222I-02
8-Lead SOIC
3.90mm x 4.92mm x 1.37mm body package
M Package
Top View
Q0
nQ0
Q1
nQ1
CLK
Pulldown
1
2
3
4
Q0
Q1
n
Q1
5
V
DD
G
N
D
ICS85222I-02 Data Sheet 1-TO-2, LVCMOS/LVTTL -TO- DIFFERENTIAL HSTL TRANSLATOR
ICS85222AMI-02 APRIL 25, 2014 2 ©2014 Integrated Device Technology, Inc.
Pin Descriptions and Characteristics
Table 1. Pin Descriptions
NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values.
NOTE: Unused output pairs must be terminated.
Table 2. Pin Characteristics
Number Name Type Description
1 Q0 Output Differential output pair. HSTL interface levels.
2 nQ0 Output Differential output pair. HSTL interface levels.
3 Q1 Output Differential output pair. HSTL interface levels.
4 nQ1 Output Differential output pair. HSTL interface levels.
5 GND Power Power supply ground.
6 nc Unused No connect
7 CLK Input Pulldown LVCMOS / LVTTL clock input.
8V
DD
Power Positive supply pin.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
C
IN
Input Capacitance 4 pF
R
PULLDOWN
Input Pulldown Resistor 51 k
ICS85222I-02 Data Sheet 1-TO-2, LVCMOS/LVTTL -TO- DIFFERENTIAL HSTL TRANSLATOR
ICS85222AMI-02 APRIL 25, 2014 3 ©2014 Integrated Device Technology, Inc.
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress
specifications only. Functional operation of the product at these conditions or any conditions beyond those listed in the DC Characteristics or
AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability.
DC Electrical Characteristics
Table 3A. Power Supply DC Characteristics, V
DD
= 3.3V ± 5%, T
A
= -40°C to 85°C
Table 3B. LVCMOS/LVTTL DC Characteristics, V
DD
= 3.3V ± 5%, T
A
= -40°C to 85°C
Table 3C. HSTL DC Characteristics, V
DD
= 3.3V ± 5%, T
A
= -40°C to 85°C
NOTE 1: All outputs must be terminated with 50 to ground.
Item Rating
Supply Voltage, V
DD
4.6V
Inputs, V
I
-0.5V to V
DD
+ 0.5V
Outputs, I
O
Continuous Current
Surge Current
50mA
100mA
Junction Temperature, T
J
125°C
Storage Temperature, T
STG
-65°C to 150°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Positive Supply Voltage 3.135 3.3 3.465 V
I
DD
Power Supply Current Outputs not loaded 50 mA
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage 2 V
DD
+ 0.3 V
V
IL
Input Low Voltage -0.3 0.8 V
I
IH
Input High Current CLK V
DD
= V
IN
= 3.465V 150 µA
I
IL
Input Low Current CLK V
DD
= 3.465V, V
IN
= 0V -5 µA
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
OH
Output High Voltage; NOTE 1 1.0 1.4 V
V
OL
Output Low Voltage; NOTE 1 0 0.4 V
V
OX
Output Crossover Voltage 0.5 0.9 V
V
SWING
Peak-to-Peak Output
Voltage Swing
0.6 1.0 1.4 V

85222AMI-02LF

Mfr. #:
Manufacturer:
IDT
Description:
Translation - Voltage Levels Dual LVCMOS Translator 2 Input
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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