NB3N1900K
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19
HCSL Output Buffer
L1
L1’
L2
Rs
L2’
Rs
L4
L4’
Rt Rt
PCI Express
Add−in Board
REF_CLK Input
L3’ L3
Figure 7. PCI Express Connector Routing
Table 32. ALTERNATIVE TERMINATION FOR LVDS AND OTHER COMMON DIFFERENTIAL SIGNALS (Figure 8)
Vdiff (V) Vpp (V) Vcm (V)
R1 (W) R2 (W) R3 (W) R4 (W)
Note
0.45 0.22 1.08 33 150 100 100
0.58 0.28 0.6 33 78.7 137 100
0.60 0.3 1.2 33 174 140 100 Standard LVDS
R1a = R1b = R1
R2a = R2b = R2
L1
L1’
R1a
R1b
L2
R3
L2’
L4
R4
L4’
HCSL Output Buffer
R2a R2b
Down Device
REF_CLK Input
L3’ L3
Figure 8. Alternate Termination for LVDS
Table 33. CABLE CONNECTED AC COUPLED APPLICATION (Figure 9)
Component Value Note
R5a, R5b 8.2k 5%
R6a, R6b 1k 5%
Cc
0.1 mF
Vcm 0.350 V
NB3N1900K
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20
3.3 V
Cc
L4
L4’
Cc
R5a R5b
Figure 9. Cable−Connected AC Coupled Application
R6a R6b
POWER FILTERING EXAMPLE
Ferrite Bead Power Filtering
Recommended ferrite bead filtering equivalent to the following:
600 W impedance at 100 MHz, 0.1 W DCR max., 800 mA current rating.
V3P3
FB1
R1
VDDA
Place at pin
VDD for PLL
FERRITE
2.2
C9
1 mF
C7
0.1 mF
R2
2.2
C10
1
mF
VDDR
C8
0.1 mF
VDD
VDD for Input Receiver
C5
0.1 mF
VDD
F C5
0.1 mF
C1
10 mF
C2
0.1 mF
C4
0.1 mF
C3
0.1 mF
C5
0.1 mF
C5
0.1 mF
Figure 10. Schematic Example of the NB3N1900K Power Filtering
Table 34. ORDERING INFORMATION
Device Package Shipping
NB3N1900KMNG QFN−72
(Pb−Free)
168 Units / Tray
NB3N1900KMNTXG QFN−72
(Pb−Free)
1000 / Tape & Reel
NB3N1900KMNTWG QFN−72
(Pb−Free)
1000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
NOTE: Pin 1 orientation for TWG Suffix is Quadrant 1, upper left; Pin 1 orientation for TXG Suffix is Quadrant 2, upper right
NB3N1900K
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21
PACKAGE DIMENSIONS
QFN72 10x10, 0.5P
CASE 485DK
ISSUE O
SEATING
0.15 C
(A3)
A
A1
b
1
72
72X
L
72X
BOTTOM VIEW
TOP VIEW
SIDE VIEW
D
A B
E
0.15
C
PIN ONE
LOCATION
0.10 C
0.08 C
C
e
A0.10 B
C
0.05
C
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSIONS: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.15 AND 0.25mm FROM THE TERMINAL TIP.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
DIM MIN MAX
MILLIMETERS
A 0.80 1.00
A1 0.00 0.05
A3 0.20 REF
b 0.18 0.30
D 10.00 BSC
D2 5.85 6.15
E 10.00 BSC
6.15E2 5.85
e 0.50 BSC
L 0.30 0.50
PLANE
SOLDERING FOOTPRINT*
L1 0.00 0.15
NOTE 4
E2
D2
NOTE 3
DETAIL B
L1
DETAIL A
L
ALTERNATE
CONSTRUCTIONS
L
DETAIL B
MOLD CMPDEXPOSED Cu
ALTERNATE
CONSTRUCTION
DETAIL A
DIMENSIONS: MILLIMETERS
10.30
6.25
6.25
0.50
0.63
0.32
72X
72X
PITCH
10.30
PKG
OUTLINE
RECOMMENDED
1
A
M
0.10 BC
A
M
0.10 BC
M
M
19
55
36
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
P
UBLICATION ORDERING INFORMATION
N. American Technical Support: 800−282−9855 Toll Free
USA/Canada
Europe, Middle East and Africa Technical Support:
Phone: 421 33 790 2910
Japan Customer Focus Center
Phone: 81−3−5817−1050
NB3N1900K/D
Intel is a registered trademark of Intel Corporation.
PCIe and PCI−SIG are registered trademarks of PCI−SIG.
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your loc
al
Sales Representative
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coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf
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NB3N1900KMNTWG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Clock Buffer 3.3V 1:19 HCSL FANOU
Lifecycle:
New from this manufacturer.
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