Extremely Accurate I
2
C-Integrated
RTC/TCXO/Crystal
10 Maxim Integrated
DS3231
32kHz TCXO
The temperature sensor, oscillator, and control logic
form the TCXO. The controller reads the output of the
on-chip temperature sensor and uses a lookup table to
determine the capacitance required, adds the aging
correction in AGE register, and then sets the capaci-
tance selection registers. New values, including
changes to the AGE register, are loaded only when a
change in the temperature value occurs, or when a
user-initiated temperature conversion is completed.
Temperature conversion occurs on initial application of
V
CC
and once every 64 seconds afterwards.
Power Control
This function is provided by a temperature-compensat-
ed voltage reference and a comparator circuit that
monitors the V
CC
level. When V
CC
is greater than V
PF
,
the part is powered by V
CC
. When V
CC
is less than V
PF
but greater than V
BAT
, the DS3231 is powered by V
CC
.
If V
CC
is less than V
PF
and is less than V
BAT
, the
device is powered by V
BAT
. See Table 1.
To preserve the battery, the first time V
BAT
is applied to
the device, the oscillator will not start up until V
CC
exceeds V
PF
, or until a valid I
2
C address is written to
the part. Typical oscillator startup time is less than one
second. Approximately 2 seconds after V
CC
is applied,
or a valid I
2
C address is written, the device makes a
temperature measurement and applies the calculated
correction to the oscillator. Once the oscillator is run-
ning, it continues to run as long as a valid power
source is available (V
CC
or V
BAT
), and the device con-
tinues to measure the temperature and correct the
oscillator frequency every 64 seconds.
On the first application of power (V
CC
) or when a valid
I
2
C address is written to the part (V
BAT
), the time and
date registers are reset to 01/01/00 01 00:00:00
(DD/MM/YY DOW HH:MM:SS).
V
BAT
Operation
There are several modes of operation that affect the
amount of V
BAT
current that is drawn. While the device
is powered by V
BAT
and the serial interface is active,
active battery current, I
BATA
, is drawn. When the serial
interface is inactive, timekeeping current (I
BATT
), which
includes the averaged temperature conversion current,
I
BATTC
, is used (refer to Application Note 3644:
Power
Considerations for Accurate Real-Time Clocks
for
details). Temperature conversion current, I
BATTC
, is
specified since the system must be able to support the
periodic higher current pulse and still maintain a valid
voltage level. Data retention current, I
BATTDR
, is the
current drawn by the part when the oscillator is
stopped (EOSC = 1). This mode can be used to mini-
mize battery requirements for times when maintaining
time and date information is not necessary, e.g., while
the end system is waiting to be shipped to a customer.
Pushbutton Reset Function
The DS3231 provides for a pushbutton switch to be
connected to the RST output pin. When the DS3231 is
not in a reset cycle, it continuously monitors the RST
signal for a low going edge. If an edge transition is
detected, the DS3231 debounces the switch by pulling
the RST low. After the internal timer has expired
(PB
DB
), the DS3231 continues to monitor the RST line.
If the line is still low, the DS3231 continuously monitors
the line looking for a rising edge. Upon detecting
release, the DS3231 forces the RST pin low and holds it
low for t
RST
.
RST is also used to indicate a power-fail condition.
When V
CC
is lower than V
PF
, an internal power-fail sig-
nal is generated, which forces the RST pin low. When
V
CC
returns to a level above V
PF
, the RST pin is held
low for approximately 250ms (t
REC
) to allow the power
supply to stabilize. If the oscillator is not running (see
the
Power Control
section) when V
CC
is applied, t
REC
is
bypassed and RST immediately goes high. Assertion of
the RST output, whether by pushbutton or power-fail
detection, does not affect the internal operation of the
DS3231.
Real-Time Clock
With the clock source from the TCXO, the RTC provides
seconds, minutes, hours, day, date, month, and year
information. The date at the end of the month is auto-
matically adjusted for months with fewer than 31 days,
including corrections for leap year. The clock operates
in either the 24-hour or 12-hour format with an AM/PM
indicator.
The clock provides two programmable time-of-day
alarms and a programmable square-wave output. The
INT/SQW pin either generates an interrupt due to alarm
condition or outputs a square-wave signal and the
selection is controlled by the bit INTCN.
SUPPLY CONDITION ACTIVE SUPPLY
V
CC
< V
PF
, V
CC
< V
BAT
V
BAT
V
CC
< V
PF
, V
CC
> V
BAT
V
CC
V
CC
> V
PF
, V
CC
< V
BAT
V
CC
V
CC
> V
PF
, V
CC
> V
BAT
V
CC
Table 1. Power Control
Extremely Accurate I
2
C-Integrated
RTC/TCXO/Crystal
Maxim Integrated 11
DS3231
Figure 1. Timekeeping Registers
Note: Unless otherwise specified, the registers’ state is not defined when power is first applied.
A D D R ESS
BIT 7
MSB
BIT 6 BIT 5 BIT 4 BIT 3 BIT 2 BIT 1
BIT 0
LSB
FUNCTION RANGE
00h 0 10 Seconds Seconds Seconds 00–59
01h 0 10 Minutes Minutes Minutes 00–59
AM/PM
02h 0 12/24
20 Hour
10 Hour Hour Hours
1–12 + AM/PM
00–23
03h 0 0 0 0 0 Day Day 1–7
04h 0 0 10 Date Date Date 01–31
05h Century 0 0 10 Month Month
Month/
Century
01–12 +
Century
06h 10 Year Year Year 00–99
07h A1M1 10 Seconds Seconds Alarm 1 Seconds 00–59
08h A1M2 10 Minutes Minutes Alarm 1 Minutes 00–59
AM/PM
09h A1M3 12/24
20 Hour
10 Hour Hour Alarm 1 Hours
1–12 + AM/PM
00–23
Day Alarm 1 Day 1–7
0Ah A1M4 DY/DT 10 Date
Date Alarm 1 Date 1–31
0Bh A2M2 10 Minutes Minutes Alarm 2 Minutes 00–59
AM/PM
0Ch A2M3 12/24
20 Hour
10 Hour Hour Alarm 2 Hours
1–12 + AM/PM
00–23
Day Alarm 2 Day 1–7
0Dh A2M4 DY/DT 10 Date
Date Alarm 2 Date 1–31
0Eh EOSC BBSQW CONV RS2 RS1 INTCN A2IE A1IE Control
0Fh OSF 0 0 0 EN32kHz BSY A2F A1F Control/Status
10h SIGN DATA DATA DATA DATA DATA DATA DATA Aging Offset
11h SIGN DATA DATA DATA DATA DATA DATA DATA MSB of Temp
12h DATA DATA 0 0 0 0 0 0 LSB of Temp
Address Map
Figure 1 shows the address map for the DS3231 time-
keeping registers. During a multibyte access, when the
address pointer reaches the end of the register space
(12h), it wraps around to location 00h. On an I
2
C
START or address pointer incrementing to location 00h,
the current time is transferred to a second set of regis-
ters. The time information is read from these secondary
registers, while the clock may continue to run. This
eliminates the need to reread the registers in case the
main registers update during a read.
I
2
C Interface
The I
2
C interface is accessible whenever either V
CC
or
V
BAT
is at a valid level. If a microcontroller connected
to the DS3231 resets because of a loss of V
CC
or other
event, it is possible that the microcontroller and
DS3231 I
2
C communications could become unsyn-
chronized, e.g., the microcontroller resets while read-
ing data from the DS3231. When the microcontroller
resets, the DS3231 I
2
C interface may be placed into a
known state by toggling SCL until SDA is observed to
be at a high level. At that point the microcontroller
should pull SDA low while SCL is high, generating a
START condition.
Clock and Calendar
The time and calendar information is obtained by read-
ing the appropriate register bytes. Figure 1 illustrates
the RTC registers. The time and calendar data are set
or initialized by writing the appropriate register bytes.
The contents of the time and calendar registers are in
Extremely Accurate I
2
C-Integrated
RTC/TCXO/Crystal
12 Maxim Integrated
DS3231
the binary-coded decimal (BCD) format. The DS3231
can be run in either 12-hour or 24-hour mode. Bit 6 of
the hours register is defined as the 12- or 24-hour
mode select bit. When high, the 12-hour mode is
selected. In the 12-hour mode, bit 5 is the AM/PM bit
with logic-high being PM. In the 24-hour mode, bit 5 is
the 20-hour bit (20–23 hours). The century bit (bit 7 of
the month register) is toggled when the years register
overflows from 99 to 00.
The day-of-week register increments at midnight.
Values that correspond to the day of week are user-
defined but must be sequential (i.e., if 1 equals
Sunday, then 2 equals Monday, and so on). Illogical
time and date entries result in undefined operation.
When reading or writing the time and date registers, sec-
ondary (user) buffers are used to prevent errors when
the internal registers update. When reading the time and
date registers, the user buffers are synchronized to the
internal registers on any START and when the register
pointer rolls over to zero. The time information is read
from these secondary registers, while the clock contin-
ues to run. This eliminates the need to reread the regis-
ters in case the main registers update during a read.
The countdown chain is reset whenever the seconds regis-
ter is written. Write transfers occur on the acknowledge
from the DS3231. Once the countdown chain is reset, to
avoid rollover issues the remaining time and date registers
must be written within 1 second. The 1Hz square-wave out-
put, if enabled, transitions high 500ms after the seconds
data transfer, provided the oscillator is already running.
Alarms
The DS3231 contains two time-of-day/date alarms.
Alarm 1 can be set by writing to registers 07h to 0Ah.
Alarm 2 can be set by writing to registers 0Bh to 0Dh.
The alarms can be programmed (by the alarm enable
and INTCN bits of the control register) to activate the
INT/SQW output on an alarm match condition. Bit 7 of
each of the time-of-day/date alarm registers are mask
bits (Table 2). When all the mask bits for each alarm
are logic 0, an alarm only occurs when the values in the
timekeeping registers match the corresponding values
stored in the time-of-day/date alarm registers. The
alarms can also be programmed to repeat every sec-
ond, minute, hour, day, or date. Table 2 shows the pos-
sible settings. Configurations not listed in the table will
result in illogical operation.
The DY/DT bits (bit 6 of the alarm day/date registers)
control whether the alarm value stored in bits 0 to 5 of
that register reflects the day of the week or the date of
the month. If DY/DT is written to logic 0, the alarm will
be the result of a match with date of the month. If
DY/DT is written to logic 1, the alarm will be the result of
a match with day of the week.
When the RTC register values match alarm register set-
tings, the corresponding Alarm Flag ‘A1F’ or ‘A2F’ bit is
set to logic 1. If the corresponding Alarm Interrupt
Enable ‘A1IE’ or ‘A2IE’ is also set to logic 1 and the
INTCN bit is set to logic 1, the alarm condition will acti-
vate the INT/SQW signal. The match is tested on the
once-per-second update of the time and date registers.
Table 2. Alarm Mask Bits
ALARM 1 REGISTER MASK BITS (BIT 7)
DY/DT
A1M4 A1M3 A1M2 A1M1
ALARM RATE
X 1 1 1 1 Alarm once per second
X 1 1 1 0 Alarm when seconds match
X 1 1 0 0 Alarm when minutes and seconds match
X 1 0 0 0 Alarm when hours, minutes, and seconds match
0 0 0 0 0 Alarm when date, hours, minutes, and seconds match
1 0 0 0 0 Alarm when day, hours, minutes, and seconds match
ALARM 2 REGISTER MASK BITS (BIT 7)
DY/DT
A2M4 A2M3 A2M2
ALARM RATE
X 1 1 1 Alarm once per minute (00 seconds of every minute)
X 1 1 0 Alarm when minutes match
X 1 0 0 Alarm when hours and minutes match
0 0 0 0 Alarm when date, hours, and minutes match
1 0 0 0 Alarm when day, hours, and minutes match

DS3231SN#

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Real Time Clock Integrated RTC/TCXO/Crystal
Lifecycle:
New from this manufacturer.
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