CY28416
Document #: 38-07657 Rev. *C Page 10 of 15
Absolute Maximum Conditions
Parameter Description Condition Min. Max. Unit
V
DD
Core Supply Voltage –0.5 4.6 V
V
DD_A
Analog Supply Voltage –0.5 4.6 V
V
IN
Input Voltage Relative to V
SS
–0.5 V
DD
+ 0.5 VDC
T
S
Temperature, Storage Non-functional –65 150 °C
T
A
Temperature, Operating Ambient Functional 0 70 °C
T
J
Temperature, Junction Functional 150 °C
Ø
JC
Dissipation, Junction to Case Mil-Spec 883E Method 1012.1 15 °C/W
Ø
JA
Dissipation, Junction to Ambient JEDEC (JESD 51) 45 °C/W
ESD
HBM
ESD Protection (Human Body Model) MIL-STD-883, Method 3015 2000 V
UL-94 Flammability Rating At 1/8 in. V–0
MSL Moisture Sensitivity Level 1
Multiple Supplies: The Voltage on any input or I/O pin cannot exceed the power pin during power-up. Power supply sequencing is NOT required.
DC Electrical Specifications
Parameter Description Condition Min. Max. Unit
VDD_A
,
VDD_REF,
VDD_PCI,
VDD_3V66,
VDD_48,
VDD_CPU
3.3V Operating Voltage 3.3 ± 5% 3.135 3.465 V
V
ILI2C
Input Low Voltage SDATA, SCLK 1.0 V
V
IHI2C
Input High Voltage SDATA, SCLK 2.2 V
V
IL_FS
FS_[A:C] Input Low Voltage 0.7 V
DD
+ 0.5 V
V
IH_FS
FS_[A:C] Input High Voltage V
SS
– 0.3 0.35 V
V
IL
Input Low Voltage V
SS
– 0.5 0.8 V
V
IH
Input High Voltage 2.0 V
DD
+ 0.5 V
I
IL
Input Low Leakage Current Except internal pull-up resistors, 0 < V
IN
< V
DD
–5 µA
I
IH
Input High Leakage Current Except internal pull-down resistors, 0 < V
IN
< V
DD
–5µA
V
OL
Output Low Voltage I
OL
= 1 mA 0.4 V
V
OH
Output High Voltage I
OH
= –1 mA 2.4 V
I
OZ
High-impedance Output Current –10 10 µA
C
IN
Input Pin Capacitance 2 5 pF
C
OUT
Output Pin Capacitance 3 6 pF
L
IN
Pin Inductance –7nH
V
XIH
Xin High Voltage 0.7V
DD
V
DD
V
V
XIL
Xin Low Voltage 0 0.3V
DD
V
I
DD3.3V
Dynamic Supply Current At max load and freq per Ta b le 6 and Figure 7 400 mA
I
PD3.3V
Power-down Supply Current PD asserted, Outputs driven 70 mA
I
PD3.3V
Power-down Supply Current PD asserted, Outputs Tri-stated 2 mA
[+] Feedback
CY28416
Document #: 38-07657 Rev. *C Page 11 of 15
AC Electrical Specifications
Parameter Description Condition Min. Max. Unit
Crystal
T
DC
XIN Duty Cycle The device will operate reliably with input duty
cycles up to 30/70 but the REF clock duty cycle
will not be within specification
47.5 52.5 %
T
PERIOD
XIN Period When XIN is driven from an external clock
source
69.841 71.0 ns
T
R
/ T
F
XIN Rise and Fall Times Measured between 0.3V
DD
and 0.7V
DD
10.0 ns
T
CCJ
XIN Cycle to Cycle Jitter As an average over 1-µs duration 500 ps
L
ACC
Long-term Accuracy Over 150 ms 300 ppm
CPU at 0.7V
T
DC
CPUT and CPUC Duty Cycle Measured at crossing point V
OX
40 60 %
T
PERIOD
100-MHz CPUT and CPUC Period Measured at crossing point V
OX
9.9970 10.003 ns
T
PERIOD
133-MHz CPUT and CPUC Period Measured at crossing point V
OX
7.4978 7.5023 ns
T
PERIOD
166-MHz CPUT and CPUC Period Measured at crossing point V
OX
5.9982 6.0018 ns
T
PERIOD
200-MHz CPUT and CPUC Period Measured at crossing point V
OX
4.9985 5.0015 ns
T
PERIOD
266-MHz CPUT and CPUC Period Measured at crossing point V
OX
3.7489 3.7511 ns
T
PERIODSS
100-MHz CPUT and CPUC Period, SSC Measured at crossing point V
OX
9.9970 10.0533 ns
T
PERIODSS
133-MHz CPUT and CPUC Period, SSC Measured at crossing point V
OX
7.4978 7.5400 ns
T
PERIODSS
166-MHz CPUT and CPUC Period, SSC Measured at crossing point V
OX
5.9982 6.0320 ns
T
PERIODSS
200-MHz CPUT and CPUC Period, SSC Measured at crossing point V
OX
4.9985 5.0266 ns
T
PERIODSS
266-MHz CPUT and CPUC Period, SSC Measured at crossing point V
OX
3.7489 3.7700 ns
T
SKEW
Any CPUT/C to CPUT/C Clock Skew,
SSC
Measured at crossing point V
OX
160 ps
T
CCJ
CPUT/C Cycle to Cycle Jitter Measured at crossing point V
OX
–90ps
T
CCJ
CPU2/SRC4 Cycle to Cycle Jitter Measured at crossing point V
OX
150 ps
T
R
/ T
F
CPUT and CPUC Rise and Fall Times Measured from V
OL
= 0.175 to V
OH
= 0.525V 175 700 ps
T
RFM
Rise/Fall Matching Determined as a fraction of 2*(T
R
– T
F
)/(T
R
+ T
F
)– 20 %
T
R
Rise Time Variation 125 ps
T
F
Fall Time Variation 125 ps
V
HIGH
Voltage High Math averages Figure 7 660 850 mv
V
LOW
Voltage Low Math averages Figure 7 –150 mv
V
OX
Crossing Point Voltage at 0.7V Swing 250 550 mv
V
OVS
Maximum Overshoot Voltage V
HIGH
+
0.3
V
V
UDS
Minimum Undershoot Voltage –0.3 V
V
RB
Ring Back Voltage See Figure 7. Measure SE 0.2 V
SRC
T
DC
SRCT and SRCC Duty Cycle Measured at crossing point V
OX
45 55 %
T
PERIOD
100-MHz SRCT and SRCC Period Measured at crossing point V
OX
9.9970 10.003 ns
T
PERIODSS
100-MHz SRCT and SRCC Period, SSC Measured at crossing point V
OX
9.9970 10.0533 ns
T
SKEW
Any SRCT/C to SRCT/C Clock Skew Measured at crossing point V
OX
130 ps
T
CCJ
SRCT/C Cycle to Cycle Jitter Measured at crossing point V
OX
125 ps
L
ACC
SRCT/C Long Term Accuracy Measured at crossing point V
OX
300 ppm
T
R
/ T
F
SRCT and SRCC Rise and Fall Times Measured from V
OL
= 0.175 to V
OH
= 0.525V 175 700 ps
T
RFM
Rise/Fall Matching Determined as a fraction of 2*(T
R
– T
F
)/(T
R
+ T
F
)– 20 %
T
R
Rise Time Variation 125 ps
[+] Feedback
CY28416
Document #: 38-07657 Rev. *C Page 12 of 15
T
F
Fall Time Variation 125 ps
V
HIGH
Voltage High Math averages Figure 7 660 850 mv
V
LOW
Voltage Low Math averages Figure 7 –150 mv
V
OX
Crossing Point Voltage at 0.7V Swing 220 550 mV
V
OVS
Maximum Overshoot Voltage V
HIGH
+
0.3
V
V
UDS
Minimum Undershoot Voltage –0.3 V
V
RB
Ring Back Voltage See Figure 7. Measure SE 0.2 V
PCI/PCIF
T
DC
PCI Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
Spread Disabled PCIF/PCI Period Measurement at 1.5V 29.9910 30.0090 ns
T
PERIOD
Spread Enabled PCIF/PCI Period Measurement at 1.5V 29.9910 30.1598 ns
T
HIGH
PCIF and PCI high time Measurement at 2.4V 12.0 ns
T
LOW
PCIF and PCI low time Measurement at 0.4V 12.0 ns
T
R
/ T
F
PCIF and PCI rise and fall times Measured between 0.4V and 2.4V 0.3 1.2 ns
T
SKEW
Any PCI clock to Any PCI clock Skew Measurement at 1.5V 500 ps
T
CCJ
PCIF and PCI Cycle to Cycle Jitter Measurement at 1.5V 500 ps
DOT
T
DC
DOT96T and DOT96C Duty Cycle Measured at crossing point V
OX
45 55 %
T
PERIOD
DOT96T and DOT96C Period Measured at crossing point V
OX
10.4135 10.4198 ns
T
CCJ
DOT96T/C Cycle to Cycle Jitter Measured at crossing point V
OX
250 ps
L
ACC
DOT96T/C Long Term Accuracy Measured at crossing point V
OX
300 ppm
T
R
/ T
F
DOT96T and DOT96C Rise and Fall
Times
Measured from V
OL
= 0.175 to V
OH
= 0.525V 175 780 ps
T
RFM
Rise/Fall Matching Determined as a fraction of 2*(T
R
– T
F
)/(T
R
+ T
F
)– 20 %
T
R
Rise Time Variation 125 ps
T
F
Fall Time Variation 125 ps
V
HIGH
Voltage High Math averages Figure 7 660 850 mv
V
LOW
Voltage Low Math averages Figure 7 –150 mv
V
OX
Crossing Point Voltage at 0.7V Swing 200 550 mV
V
OVS
Maximum Overshoot Voltage V
HIGH
+
0.3
V
V
UDS
Minimum Undershoot Voltage –0.3 V
V
RB
Ring Back Voltage See Figure 7. Measure SE 0.2 V
USB
T
DC
Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
Period Measurement at 1.5V 20.8271 20.8396 ns
T
HIGH
USB high time Measurement at 2.4V 8.090 10.200 ns
T
LOW
USB low time Measurement at 0.4V 7.690 9.950 ns
T
R
/ T
F
Rise and Fall Times Measured between 0.4V and 2.4V 0.4 1.4 ns
T
CCJ
Cycle to Cycle Jitter Measurement at 1.5V 400 ps
REF
T
DC
REF Duty Cycle Measurement at 1.5V 45 55 %
T
PERIOD
REF Period Measurement at 1.5V 69.8203 69.8622 ns
T
R
/ T
F
REF Rise and Fall Times Measured between 0.4V and 2.4V 0.2 2.1 ns
AC Electrical Specifications (continued)
Parameter Description Condition Min. Max. Unit
[+] Feedback

CY28416OXCT

Mfr. #:
Manufacturer:
Cypress Semiconductor
Description:
IC CLK GEN CPU 266MHZ 2CIRC 48SS
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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