DS18B20U+ Datasheet DS18B20U+, DS18B20, DS18B20Z | P16-P18

DS18B20

16 of 22

The DS18B20 samples the 1-Wire bus during a window that lasts from 15µs to 60µs after the master

initiates the write time slot. If the bus is high during the sampling window, a 1 is written to the DS18B20.

If the line is low, a 0 is written to the DS18B20.

Figure 14. Read/Write Time Slot Timing Diagram

READ TIME SLOTS

The DS18B20 can only transmit data to the master when the master issues read time slots. Therefore, the

master must generate read time slots immediately after issuing a Read Scratchpad [BEh] or Read Power

Supply [B4h] command, so that the DS18B20 can provide the requested data. In addition, the master can

generate read time slots after issuing Convert T [44h] or Recall E

[B8h] commands to find out the status

of the operation as explained in the DS18B20 Function Commands section.

All read time slots must be a minimum of 60µs in duration with a minimum of a 1µs recovery time

between slots. A read time slot is initiated by the master device pulling the 1-Wire bus low for a

minimum of 1µs and then releasing the bus (see Figure 14). After the master initiates the read time slot,

the DS18B20 will begin transmitting a 1 or 0 on bus. The DS18B20 transmits a 1 by leaving the bus high

and transmits a 0 by pulling the bus low. When transmitting a 0, the DS18B20 will release the bus by the

end of the time slot, and the bus will be pulled back to its high idle state by the pullup resister. Output

15µs

GND

1-WIRE BUS

60µs < T

“0” < 120µs

s < T

REC

< ∞

DS18B20 Samples

MIN TYP MAX

30µs

> 1

MASTER WRITE “0” SLOT

MASTER WRITE “1” SLOT

GND

1-WIRE BUS

MASTER READ “0” SLOT

MASTER READ “1” SLOT

Master samples

START

OF SLOT

START

OF SLOT

> 1

s < T

REC

∞

15µs

DS18B20 Samples

MIN TYP MAX

LINE TYPE LEGEND

Bus master pulling low DS18B20 pulling low

Resistor pullup

> 1

DS18B20

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data from the DS18B20 is valid for 15µs after the falling edge that initiated the read time slot. Therefore,

the master must release the bus and then sample the bus state within 15µs from the start of the slot.

Figure 15 illustrates that the sum of T

INIT

, T

, and T

SAMPLE

must be less than 15µs for a read time slot.

Figure 16 shows that system timing margin is maximized by keeping T

INIT

and T

as short as possible

and by locating the master sample time during read time slots towards the end of the 15µs period.

Figure 15. Detailed Master Read 1 Timing

Figure 16. Recommended Master Read 1 Timing

RELATED APPLICATION NOTES

The following application notes can be applied to the DS18B20 and are available on our website at

www.maxim-ic.com.

Application Note 27: Understanding and Using Cyclic Redundancy Checks with Maxim iButton Products

Application Note 122: Using Dallas' 1-Wire ICs in 1-Cell Li-Ion Battery Packs with Low-Side N-Channel

Safety FETs Master

Application Note 126: 1-Wire Communication Through Software

Application Note 162: Interfacing the DS18x20/DS1822 1-Wire Temperature Sensor in a Microcontroller

Environment

Application Note 208: Curve Fitting the Error of a Bandgap-Based Digital Temperature Sensor

Application Note 2420: 1-Wire Communication with a Microchip PICmicro Microcontroller

Application Note 3754: Single-Wire Serial Bus Carries Isolated Power and Data

Sample 1-Wire subroutines that can be used in conjunction with Application Note 74: Reading and

Writing iButtons via Serial Interfaces can be downloaded from the Maxim website.

GND

1-WIRE BUS

15µs

VIH of Master

INT

> 1µs

Master samples

LINE TYPE LEGEND

Bus master pulling low

Resistor pullup

GND

1-WIRE BUS

15µs

VIH of Master

small

INT

small

Master samples

DS18B20

18 of 22

DS18B20 OPERATION EXAMPLE 1

In this example there are multiple DS18B20s on the bus and they are using parasite power. The bus

master initiates a temperature conversion in a specific DS18B20 and then reads its scratchpad and

recalculates the CRC to verify the data.

MASTER MODE

DATA (LSB FIRST)

COMMENTS

Reset

Master issues reset pulse.

Presence

DS18B20s respond with presence pulse.

55h

Master issues Match ROM command.

64-bit ROM code

Master sends DS18B20 ROM code.

44h

Master issues Convert T command.

DQ line held high by

strong pullup

Master applies strong pullup to DQ for the duration of the

conversion (t

CONV

Reset

Master issues reset pulse.

Presence

DS18B20s respond with presence pulse.

55h

Master issues Match ROM command.

64-bit ROM code

Master sends DS18B20 ROM code.

BEh

Master issues Read Scratchpad command.

Rx 9 data bytes

Master reads entire scratchpad including CRC. The master

then recalculates the CRC of the first eight data bytes from the

scratchpad and compares the calculated CRC with the read

CRC (byte 9). If they match, the master continues; if not, the

read operation is repeated.

DS18B20 OPERATION EXAMPLE 2

In this example there is only one DS18B20 on the bus and it is using parasite power. The master writes to

the T

, T

, and configuration registers in the DS18B20 scratchpad and then reads the scratchpad and

recalculates the CRC to verify the data. The master then copies the scratchpad contents to EEPROM.

MASTER MODE

DATA (LSB FIRST)

COMMENTS

Reset

Master issues reset pulse.

Presence

DS18B20 responds with presence pulse.

CCh

Master issues Skip ROM command.

4Eh

Master issues Write Scratchpad command.

3 data bytes

Master sends three data bytes to scratchpad (T

, T

, and config).

Reset

Master issues reset pulse.

Presence

DS18B20 responds with presence pulse.

CCh

Master issues Skip ROM command.

BEh

Master issues Read Scratchpad command.

Rx 9 data bytes

Master reads entire scratchpad including CRC. The master then

recalculates the CRC of the first eight data bytes from the

scratchpad and compares the calculated CRC with the read CRC

(byte 9). If they match, the master continues; if not, the read

operation is repeated.

Reset

Master issues reset pulse.

Presence

DS18B20 responds with presence pulse.

CCh

Master issues Skip ROM command.

48h

Master issues Copy Scratchpad command.

DQ line held high by

strong pullup

Master applies strong pullup to DQ for at least 10ms while copy

operation is in progress.

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P22

DS18B20U+

Mfr. #:

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Manufacturer:

Maxim Integrated

Description:

Board Mount Temperature Sensors Prgmble Resolution 1-Wire Parasite Pwr

Lifecycle:

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DS18B20U+

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