XC2C512 CoolRunner-II CPLD
24 www.xilinx.com DS096 (v3.2) March 8, 2007
Product Specification
R
Warranty Disclaimer
THESE PRODUCTS ARE SUBJECT TO THE TERMS OF THE XILINX LIMITED WARRANTY WHICH CAN BE VIEWED
AT http://www.xilinx.com/warranty.htm
. THIS LIMITED WARRANTY DOES NOT EXTEND TO ANY USE OF THE
PRODUCTS IN AN APPLICATION OR ENVIRONMENT THAT IS NOT WITHIN THE SPECIFICATIONS STATED ON THE
THEN-CURRENT XILINX DATA SHEET FOR THE PRODUCTS. PRODUCTS ARE NOT DESIGNED TO BE FAIL-SAFE
AND ARE NOT WARRANTED FOR USE IN APPLICATIONS THAT POSE A RISK OF PHYSICAL HARM OR LOSS OF
LIFE. USE OF PRODUCTS IN SUCH APPLICATIONS IS FULLY AT THE RISK OF CUSTOMER SUBJECT TO
APPLICABLE LAWS AND REGULATIONS.
Additional Information
Additional information is available for the following CoolRunner-II topics:
• XAPP784: Bulletproof CPLD Design Practices
• XAPP375: Timing Model
• XAPP376: Logic Engine
• XAPP378: Advanced Features
• XAPP382: I/O Characteristics
• XAPP389: Powering CoolRunner-II
• XAPP399: Assigning VREF Pins
To access these and all application notes with their associ-
ated reference designs, click the following link and scroll
down the page until you find the document you want:
CoolRunner-II Data Sheets and Application Notes
Device Packages
Revision History
The following table shows the revision history for this document.
Date Version Revision
7/19/02 1.0 Initial Xilinx release.
3/15/03 2.0 Added characterization data.
11/25/03 2.1 Fixed two typos.
1/26/04 2.2 Updated Tsol; added links to Data Sheets and Application Notes.
8/03/04 2.3 Pb-free documentation
10/01/04 2.4 Add Asynchronous Preset/Reset Pulse Width specification to AC Electrical Characteristics.
01/30/05 2.5 Change to I
CCSB
MAX for Commercial and Industrial.
03/07/05 2.6 Removed -6 speed grade. Modified Table 1, IOSTANDARDs.
03/20/06 3.0 Change to Product Specification. Add warranty Disclaimer. Add note to Pin Descriptions
that
GCK, GSR, and GTS pins can also be used for general purpose I/O.
02/15/07 3.1 Corrections to timing parameters t
DIN
, t
SUD
, t
PSUD
, t
PHD
, t
PH
, t
SLEW18
, t
IN
(HSTL),
t
OUT
(SSTL3), and t
Tin
(SSTL3) for -6 speed grade. Corrections to t
DIN
, t
SUD
, t
CO
, t
PSUD
,
t
PHD
, and t
PH
for the -7 speed grade. Values now match the software. There were no
changes to silicon or characterization. Added XC2C512-7FT256I and XC2C512-7FTG236I
packages. Change to V
IH
specification for 2.5V and 1.8V LVCMOS.
03/08/07 3.2 Fixed typo in note for V
IL
for LVCMOS18; removed note for V
IL
for LVCMOS33.
