LTC6912
12
6912fa
Note 1: Absolute Maximum Ratings are those values beyond which the life
of the device may be impaired.
Note 2: The LTC6912-1C and LTC6912-1I are guaranteed functional over
the operating temperature range of –40°C to 85°C. The LTC6912-1H is
guaranteed functional over the operating temperature range of –40°C to
125°C.
Note 3: The LTC6912-1C is guaranteed to meet specified performance
from 0°C to 70°C. The LTC6912-1C is designed, characterized and
expected to meet specified performance from – 40°C to 85°C but is not
tested or QA sampled at these temperatures. The LTC6912-1I is
guaranteed to meet specified performance from –40°C to 85°C. The
LTC6912-1H is guaranteed to meet specified performance from –40°C to
125°C.
Note 4: Output voltage swings are measured as differences between the
output and the respective supply rail.
Note 5: Extended operation with output shorted may cause junction
temperature to exceed the 150°C limit for GN package and 125°C for a
DFN package is not recommended.
Note 6: Gain is measured with a large signal DC test using an output
excursion between approximately 30% and 70% of supply voltage.
Note 7: Channel-to-channel isolation is measured by applying a 200kHz
input signal to one channel so that its output varies 1V
RMS
, and measuring
the output voltage RMS of the other channel relative to AGND with its
input tied to AGND. Isolation is calculated:
Isolation
B
= 20 • log
10
(V
OUTA
/V
OUTB
) or
Isolation
A
= 20 • log
10
(V
OUTB
/V
OUTA
)
High channel-to-channel isolation is strongly dependent on proper circuit
layout. See Applications Information.
Note 8: Offset voltage referred to the INA or INB input is (1 + 1/|GAIN|)
times the offset voltage of the internal op amp, where GAIN is the nominal
gain magnitude. The typical offset voltage values are for 25°C only. See
Applications Information.
Note 9: Input resistance can vary by approximately ±30% part-to-part at a
given gain setting.
Note 10: Guaranteed by design, not subject to test.
Note 11: States 13, 14 and 15 (binary 11xx) are not used. Programming a
channel to states 8 or higher will configure that particular channel into a
low power shutdown state. In addition, programming a channel into
state 15 (binary 1111) will cause that particular channel to draw up to
20mA of supply current and is not recommended.
U
U
SERIAL I TERFACE SPECIFICATIO S
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
Serial Interface Timing, Dual ±4.5V ~ ±5.5V Supplies (Note 10)
t
1
D
IN
Valid to CLK Setup ● 30 ns
t
2
D
IN
Valid to CLK Hold ● 0ns
t
3
CLK High ● 50 ns
t
4
CLK Low ● 50 ns
t
5
CS/LD Pulse Width ● 40 ns
t
6
LSB CLK to CS/LD ● 40 ns
t
7
CS/LD Low to CLK ● 20 ns
t
8
D
OUT
Output Delay C
L
= 15pF ● 85 ns
t
9
CLK Low to CS/LD Low ● 0ns
D3 D2 D31 D0 D3
D7 • • • D4
D3D4 D2 D31 D0 D3
D7 • • • D4
t
5
t
8
t
9
t
7
t
6
t
1
t
2
t
4
t
3
6912 TD
PREVIOUS BYTE CURRENT BYTE
CLK
D
IN
CS/LD
D
OUT
