ADM1021A
Rev. 7 | Page 10 of 19 | www.onsemi.com
REGISTERS
The ADM1021A contains nine registers that are used to store
the results of remote and local temperature measurements, and
high and low temperature limits, and to configure and control
the device. A description of these registers follows, and further
details are given in Table 5 to Table 7. It should be noted that
the ADM1021As registers are dual port and have different
addresses for read and write operations. Attempting to write to
a read address, or to read from a write address, produces an
invalid result. Register addresses above 0x0F are reserved for
future use or used for factory test purposes and should not be
written to.
ADDRESS POINTER REGISTER
The address pointer register does not have and does not require
an address, because it is the register to which the first data byte
of every write operation is written automatically. This data byte
is an address pointer that sets up one of the other registers for
the second byte of the write operation or for a subsequent read
operation.
VALUE REGISTERS
The ADM1021A has two registers to store the results of local
and remote temperature measurements. These registers are
written to by the ADC and can only be read over the SMBus.
STATUS REGISTER
Bit 7 of the status register indicates when it is high that the ADC
is busy converting. Bit 5 to Bit 3 are flags that indicate the
results of the limit comparisons.
If the local and/or remote temperature measurement is above
the corresponding high temperature limit or below the corre-
sponding low temperature limit, then one or more of these flags
are set. Bit 2 is a flag that is set if the remote temperature sensor
is open-circuit. These five flags are NORd together so that if any
of them are high, the
ALERT
interrupt latch is set and the
ALERT
output goes low. Reading the status register clears the
five flag bits, provided the error conditions that caused the flags
to be set have gone away. While a limit comparator is tripped
due to a value register containing an out-of-limit measurement,
or the sensor is open-circuit, the corresponding flag bit cannot
be reset. A flag bit can only be reset if the corresponding value
register contains an in-limit measurement, or the sensor is good.
Table 5. Status Register Bit Assignments
Bit Name Function
7 BUSY 1 when ADC converting
6 LHIGH
1
1 when local high temperature limit tripped
5 LLOW
1
1 when local low temperature limit tripped
4 RHIGH
1
1 when remote high temperature limit tripped
3 RLOW
1
1 when remote low temperature limit tripped
2 OPEN
1
1 when remote sensor open-circuit
1–0
Reserved
1
These flags stay high until the Status Register is read or they are reset by POR.
ADM1021A
Rev. 7 | Page 11 of 19 | www.onsemi.com
Table 6. List of ADM1021A Registers
READ Address (Hex) WRITE Address (Hex) Name Power-On Default
Not applicable Not applicable Address pointer Undefined
00 Not applicable Local temperature value 1000 0000 (0x80) (−128°C)
01 Not applicable Remote temperature value 1000 0000 (0x80) (−128°C)
02 Not applicable Status Undefined
03 09 Configuration 0000 0000 (0x00)
04 0A Conversion rate 0000 0010 (0x02)
05 0B Local temperature high limit 0111 1111 (0x7F) (+127°C)
06 0C Local temperature low limit 1100 1001 (0xC9) (−55°C)
07 0D Remote temperature high limit 0111 1111 (0x7F) (+127°C)
08 0E Remote temperature low limit 1100 1001 (0xC9) (−55°C)
Not applicable 0F
1
One-shot
10 Not applicable Reserved Reserved for future versions
11 11 Remote temperature offset 0000 0000 (0°C)
12 12 Reserved Reserved for future versions
13 13 Reserved Reserved for future versions
14 14 Reserved Reserved for future versions
15 16 Reserved Reserved for future versions
17 18 Reserved Reserved for future versions
19 Not applicable Reserved Reserved for future versions
20 21 Reserved Reserved for future versions
FE Not applicable Manufacturer device ID 0100 0001 (0x41)
FF Not applicable Die revision code 0011 xxxx (0x3x)
1
Writing to Address 0F causes the ADM1021A to perform a single measurement. It is not a data register, and data written to it is irrelevant.
The
ALERT
interrupt latch is not reset by reading the status
register, but is reset when the
ALERT
output is serviced by the
master reading the device address, provided the error condition
has gone away and the status register flag bits have been reset.
CONFIGURATION REGISTER
Two bits of the configuration register are used. If Bit 6 is 0,
which is the power-on default, the device is in operating mode
with the ADC converting. If Bit 6 is set to 1, the device is in
standby mode and the ADC does not convert. Standby mode
can also be selected by taking the
STBY
pin low. In standby
mode, the values stored in the remote and local temperature
registers remain at the values they were when the part was
placed in standby.
Bit 7 of the configuration register is used to mask the
ALERT
output. If Bit 7 is 0, which is the power-on default, the
ALERT
output is enabled. If Bit 7 is set to 1, the
ALERT
output is
disabled.
Table 7. Configuration Register Bit Assignments
Bit Name Function Power-On Default
7 MASK1 0 =
ALERT
enabled 0
1 =
ALERT
masked
6 RUN/STOP 0 = Run 1 = standby 0
5–0 Reserved 0
CONVERSION RATE REGISTER
The lowest three bits of this register are used to program the
conversion rate by dividing the ADC clock by 1, 2, 4, 8, 16, 32,
64, or 128 to give conversion times from 125 ms (Code 0x07) to
16 seconds (Code 0x00). This register can be written to and
read back over the SMBus. The higher five bits of this register
are unused and must be set to 0. Use of slower conversion times
greatly reduces the device power consumption, as shown in
Table 8.
Table 8. Conversion Rate Register Codes
Data Conversion/Sec
Average Supply Current
μA Typ at V
CC
= 3.3 V
0x00 0.0625 150
0x01 0.125 150
0x02 0.25 150
0x03 0.5 150
0x04 1 150
0x05 2 150
0x06 4 160
0x07 8 180
0x08 to 0xFF Reserved
ADM1021A
Rev. 7 | Page 12 of 19 | www.onsemi.com
LIMIT REGISTERS
The ADM1021A has four limit registers to store local and
remote and high and low temperature limits. These registers
can be written to and read back over the SMBus. The high limit
registers perform a > comparison, while the low limit registers
perform a < comparison. For example, if the high limit register
is programmed as a limit of 80° C, measuring 81°C results in an
alarm condition. Even though the temperature measurement
range is from 0° to 127°C, it is possible to program the limit
register with negative values. This is for backwards compati-
bility with the ADM1021.
OFFSET REGISTER
An offset register is provided at Address 0x11. This allows the
user to remove errors from the measured remote temperature.
These errors can be introduced by clock noise and PCB track
resistance. See Table 9 for an example of offset values.
The offset value is stored as an 8-bit, twos complement value.
The value of the offset is negative if the MSB of Register 0x11 is
1, and is positive if the MSB of Register 0x11 is 0. This value is
added to the remote temperature. The offset register defaults to
0 at power-up. The offset register range is −128°C to +127°C.
Table 9. Offset Values
Remote Remote
Offset Temperature Temperature
Register Offset (With (Without
(0x11) Value Offset) Offset)
1111 1100 −4°C 14°C 18°C
1111 1111 −1°C 17°C 18°C
0000 0000 0°C 18°C 18°C
0000 0001 +1°C 19°C 18°C
0000 0100 +4°C 22°C 18°C
ONE-SHOT REGISTER
The one-shot register is used to initiate a single conversion and
comparison cycle when the ADM1021A is in standby mode,
after which the device returns to standby. This is not a data
register as such, and it is the write operation that causes the
one-shot conversion. The data written to this address is
irrelevant and is not stored.
SERIAL BUS INTERFACE
Control of the ADM1021A is carried out via the serial bus. The
ADM1021A is connected to this bus as a slave device, under the
control of a master device. Note that the SMBus and SCL pins
are three-stated when the ADM1021A is powered down and
will not pull down the SMBus.
ADDRESS PINS
In general, every SMBus device has a 7-bit device address
(except for some devices that have extended 10-bit addresses).
When the master device sends a device address over the bus,
the slave device with that address responds.
The ADM1021A has two address pins, ADD0 and ADD1, to
allow selection of the device address so that several
ADM1021As can be used on the same bus, and/or to avoid
conflict with other devices. Although only two address pins
are provided, these are three-state and can be grounded, left
unconnected, or tied to V
DD
so that a total of nine different
addresses are possible, as shown in Table 10.
It should be noted that the state of the address pins is only
sampled at power-up, so changing them after power-up has
no effect.
Table 10. Device Addresses
ADD0
1
ADD1
1
Device Address
0 0 0011 000
0 NC 0011 001
0 1 0011 010
NC 0 0101 001
NC NC 0101 010
NC 1 0101 011
1 0 1001 100
1 NC 1001 101
1 1 1001 110
1
ADD0, ADD1 sampled at power-up only.
The serial bus protocol operates as follows:
1.
The master initiates data transfer by establishing a start
condition, defined as a high-to-low transition on the serial
data line SDATA, while the serial clock line SCLK remains
high. This indicates that an address/data stream will
follow. All slave peripherals connected to the serial bus
respond to the START condition and shift in the next
eight bits, consisting of a 7-bit address (MSB first) plus an
R/
W
bit, which determines the direction of the data
transfer, that is, whether data will be written to or read
from the slave device.
The peripheral whose address corresponds to the
transmitted address responds by pulling the data line low
during the low period before the ninth clock pulse, known
as the Acknowledge Bit. All other devices on the bus now
remain idle while the selected device waits for data to be
read from or written to it. If the R/
W
bit is a 0, the master
writes to the slave device. If the R/
W
bit is a 1, the master
reads from the slave device.

EVAL-ADM1021AEB

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
BOARD EVAL FOR ADM1021
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