LT8697
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For more information www.linear.com/LT8697
PIN FUNCTIONS
PG (Pin 19): The PG pin is the open-drain output of an
internal window comparator. PG remains low until the
USB5V pin is within ±9% of the final regulation voltage
and there are no fault conditions. The PG transition delay
is approximately 40µs. PG is valid when V
IN
is above 3.4V
regardless of the EN/UV state.
USB5V (Pin 20): The LT8697 regulates the USB5V pin to
5V. For cable drop compensation, the USB5V pin input
current is proportional to the sensed output current. The
USB5V ESD cell clamps to 9V. To allow the LT8697 output
to survive a short to 30V, the 10k R
CDC
resistor must be
in place between the USB5V pin and the output to limit
the current into this pin.
ISP (Pin 21): Current Sense (+) Pin. This is the non-inverting
input to the current sense amplifier.
ISN (Pin 22): Current Sense (–) Pin. This is the inverting
input to the current sense amplifier.
RCBL (Pin 23): Cable Drop Compensation Program Pin.
A resistor R
CBL
tied from RCBL to ground programs cable
drop compensation by setting the USB5V input current.
RCBL can source 1mA. Excessive capacitive loading on
RCBL
can degrade load transient response. Isolate load
capacitance on this pin by tying a 100k resistor between
RCBL and the capacitive load. The RCBL load monitor
output is valid when the LT8697 is enabled, otherwise the
output is zero. Float RCBL if neither the current monitor
nor the cable drop compensation feature is desired.
ICTRL (PIN 24): Current Adjustment Pin. ICTRL adjusts
the maximum V
ISP
V
ISN
drop before the LT8697 limits
the output current. Connect directly to INTV
CC
or float for
a full scale V
ISP
V
ISN
threshold of 48mV or apply values
between ground and 1V to modulate the output current
limit. There is an internalA pull-up current on this pin.
Float or tie to INTV
CC
when unused.
GND (Exposed Pad Pin 25): Ground. The exposed pad
must be connected to the negative terminal of the input
capacitor and soldered to the PCB for proper operation
and in order to lower the thermal resistance.
LT8697
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For more information www.linear.com/LT8697
BLOCK DIAGRAM
2.2µA
8697 BD
+
EN/UV
SHDN
FB
V
C
SYS
1V
ERROR
AMP
1V
V
IN
5, 6
4
PG
19
TR/SS
INTERNAL 1V REF
+
+
2
RT
C
SS
R
T
±9% WINDOW
COMPARATOR
SHDN
TSD
INTV
CC
UVLO
V
IN
UVLO
SHDN
TSD
V
IN
UVLO
+
+
SLOPE COMP
OSCILLATOR
300kHz TO 2.2MHz
SWITCH
LOGIC
AND
ANTI-
SHOOT
THROUGH
3.4V
REG
M1
M2
+
+
+
20R
4M
1M
R
R
1V
2µA
+
FB
3
SYNC
1
ICTRL
24
RCBL
R
CBL
23
GND
25
USB5V
20
ISN
22
ISP
21
BST
16
SYS
18
INTV
CC
17
PGND
7,8
SW
13,14,15
C
BST
C
VCC
C
OUT
R
SENSE
R
CDC
V
OUT
L
C
IN
V
IN
R3
OPT
R4
OPT
LOAD
V
LOAD
C
CDC
+
R
CABLE
/2
R
CABLE
/2
CABLE
LT8697
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For more information www.linear.com/LT8697
OPERATION
The LT8697 is a monolithic, constant frequency, current
mode step-down DC/DC converter. An oscillator, with
frequency set using a resistor on the RT pin, turns on the
internal top power switch at the beginning of each clock
cycle. Current in the inductor then increases until the top
switch current comparator trips and turns off the switch.
The peak inductor current is controlled by the voltage on
the internal VC node. When the top power switch turns off,
the synchronous power switch turns on until the next clock
cycle begins or inductor current falls to zero. If overload
conditions result in more than 4.2A flowing through the
bottom switch, the next clock cycle will be delayed until
switch current returns to a safe level.
To control the output voltage, the LT8697’s error ampli
-
fier ser
vos the VC node by comparing the voltage on the
USB5V
pin, divided down about 5:1, with an internal 0.97V
reference. When the load current increases, it causes a
reduction in the feedback voltage relative to the reference.
This differential error makes the error amplifier raise the
VC voltage which raises the top switch peak current limit.
The feedback process continues until
the average induc-
tor current matches the new load current and the output
voltage is in regulation.
To implement
cable drop compensation, the LT8697 drives
the RCBL pin to 20(V
ISP
V
ISN
). Current sourced from
the RCBL pin is derived from the USB5V pin, creating an
output offset above the 5V USB5V pin voltage through R
CDC
that is proportional to the load current and the R
CDC
/R
CBL
resistor ratio. The output voltage therefore increases with
increasing load current. This negative output impedance
compensates for resistive drops in wiring for remote loads.
The LT8697 error amp has two additional feedback paths
that can override the USB5V pin control of the VC node.
For output current limit, the voltage V
ISP
V
ISN
across
the output current sense resistor is not allowed to exceed
the lower of 48mV or V
ICTRL
/20. Also, the SYS pin limits
the output voltage to 5.8V. When regulation is determined
by either the output current limit or the SYS pin, USB5V
is not regulated to 5V and the output voltage falls below
its programmed value.
If the EN/UV pin is low, the LT8697 is shut down and
drawsA from
the input. When the EN/UV pin is above
1V, the switching regulator will become active.
The LT8697 operates in forced continuous mode (FCM) for
fast transient response and full frequency operation over
a wide load range. If a clock is applied to the SYNC pin
the part will synchronize to the external clock frequency
and operate in FCM.
To improve efficiency across all loads, supply current
to internal circuitry is sourced from the SYS pin when
biased at 3.3V or above. Else, the internal circuitry will
draw current from V
IN
.
When in FCM the oscillator operates continuously and
positive SW transitions are aligned to the clock. Negative
inductor current is allowed. The LT8697 can sink current
from the output and return this charge to the input in this
mode, improving load step transient response. FCM is
disabled if the V
IN
pin is held above 29V or if the SYS pin
is held above 7.5V. When FCM is disabled in these ways,
negative inductor current is not allowed and the LT8697
skips SW cycles in light load conditions.
Comparators monitoring the USB5V pin voltage will pull
the PG pin low if the output voltage varies more
than ±9%
(typical)
from the set point, or if a fault condition is present.
The oscillator reduces the LT8697’s operating frequency
when the voltage at the SYS pin is below 4V. This frequency
foldback helps to control the inductor current when the
output voltage is lower than the programmed value during
start-up or overcurrent conditions.

LT8697HUDD#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators USB 5V 2.5A Output, 42V Inpuut Synchronous Step-Down Regulator with Cable Drop Compensation
Lifecycle:
New from this manufacturer.
Delivery:
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