LT8697
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APPLICATIONS INFORMATION
Enable Pin
The LT8697 is in shutdown when the EN/UV pin is low and
active when the pin is high. The rising threshold of the EN
comparator is 1.0V, with 40mV of hysteresis. The EN/UV
pin can be tied to V
IN
if the shutdown feature is not used,
or tied to a logic level if shutdown control is required.
Adding a resistor divider from V
IN
to EN/UV programs the
LT8697 to regulate the output only when V
IN
is above a
desired voltage (see the Block Diagram). Typically, this
threshold, V
IN(EN)
, is used in situations where the input
supply is current limited, or has a relatively high source
resistance. A switching regulator draws constant power
from the source, so source current increases as source
voltage drops. This looks like a negative resistance load
to the source and can cause the source to current limit or
latch low under low source voltage conditions. The V
IN(EN)
threshold prevents the regulator from operating at source
voltages where the problems might occur. This threshold
can be adjusted by setting the values R3 and R4 such that
they satisfy the following equation:
V
IN(EN)
=
R3
R4
+1
1.0V
where the LT8697 will remain off until V
IN
is above V
IN(EN)
.
Due to the comparator’s hysteresis, switching will not stop
until the input falls slightly below V
IN(EN)
.
INTV
CC
Regulator
An internal low dropout (LDO) regulator produces the 3.4V
supply from V
IN
that powers the drivers and the internal
bias circuitry. The INTV
CC
can supply enough current for
the LT8697’s circuitry and must be bypassed to ground
with a minimum capacitance ofF. Use an X5R or an
X7R ceramic capacitor. Good bypassing is necessary to
supply the high transient currents required by the power
MOSFET gate drivers. To improve efficiency the internal
LDO can also draw current from the SYS pin when the SYS
pin is at 3.3V or higher. SYS must be tied to the LT8697
output capacitor. If the SYS pin is below 3.3V, the internal
LDO will consume current from V
IN
. Do not load INTV
CC
with more than 100µA.
Output Voltage Tracking and Soft-Start
The LT8697 allows the user to program its output voltage
ramp rate by means of the TR/SS pin. An internal 2.2μA
source pulls up the TR/
SS pin to
INTV
CC
. Putting an external
capacitor on TR/SS enables soft starting the output to pre-
vent a current
surge
on the input supply. During the soft-start
ramp the output voltage will proportionally track the TR/SS
pin voltage
. For output tracking applications, TR/SS can
be
externally driven by another voltage source. From 0V to
0.97V, the TR/SS voltage will override the internal 0.97V
reference input to the error amplifier, thus regulating the
USB5V pin voltage to 5× that of TR/SS pin. When TR/SS
is above
0.97
V, tracking is disabled and USB5V will regulate
to 5V. The TR/SS pin may be left floating if the function
is not needed.
An active pull-down circuit is connected to the TR/SS pin
which will discharge the external soft-start capacitor in
the case of fault conditions and restart the ramp when the
faults are cleared. Fault conditions that clear the soft-start
capacitor are the EN/UV pin transitioning low, V
IN
voltage
falling too low or thermal shutdown.
Output Power Good
When the LT8697’s output voltage is within the ±9%
window of the regulation point, which is V
USB5V
in the
range of 4.55V to 5.45V (typical), the output voltage is
considered good and the open-drain PG pin goes high
impedance and is typically pulled high with an external
resistor. Otherwise, the internal pull-down device will pull
the PG pin low. To prevent glitching, both the upper and
lower thresholds include 1.3% of hysteresis.
The PG pin is also actively pulled low during several fault
conditions: EN/UV pin is below 1V, INTV
CC
has fallen too
low, V
IN
is too low, or thermal shutdown.
Synchronization
To synchronize the LT8697 oscillator to an external fre
-
quency, connect a square wave (with 20% to 80% duty
cycle) to the SYNC pin. The square wave amplitude should
have valleys that are below 0.4V and peaks above 2.4V
(up to 6V).
LT8697
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APPLICATIONS INFORMATION
The LT8697 may be synchronized over a 300kHz to 2.2MHz
range. The R
T
resistor should be chosen to set the LT8697
switching frequency equal to or below the lowest synchro-
nization input
.
For example, if the synchronization signal
will be 500kHz and higher, the R
T
should be selected for
500kHz. The slope compensation is set by the RT value,
while the minimum slope compensation required to avoid
subharmonic oscillations is established by the inductor
size, input voltage, and output voltage. Since the syn
-
chronization frequency
will not change the slopes of the
inductor current waveform, if the inductor is large enough
to avoid subharmonic oscillations at the frequency set by
RT, then the slope compensation will be sufficient for all
synchronization frequencies.
Output Short Protection
The LT8697 will tolerate a shorted output. Several features
are used for protection during output short-circuit and
brownout conditions. The first is the switching frequency
will be folded back while the output is lower than the set
point to maintain inductor current control. Second, the
bottom switch current is monitored such that if inductor
current is beyond safe levels, switching of the top switch
will be delayed until the
inductor current
falls to safe levels.
The LT8697 withstands a short between its output and 12V
or 24V automotive battery voltage. The USB5V pin draws
current when held above 9V. A minimum 10k R
CDC
resistor
must be tied from USB5V to V
OUT
for robust operation with
V
OUT
above its regulation point. The remaining pins SW,
ISP, ISN, PG and SYS tied at or near the output voltage
have at least a 30V maximum rating. The output capacitor
C
OUT
absorbs ESD events on the LT8697 output.
If V
IN
is held low or floated while V
OUT
is held high, the
body diode of the LT8697 internal top power switch will
conduct high current from the SW pin to the V
IN
pin,
regardless of the state of the EN/UV pin, causing damage
to the LT8697. V
OUT
must remain equal to or lower than
V
IN
to avoid this damage to the LT8697.
Figure 8. Recommended PCB Layout for the LT8697
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PCB Layout
For proper operation and minimum EMI, care must be
taken during printed circuit board layout. Figure 8 shows
the recommended component placement with trace,
ground plane and via locations. Note that large, switched
currents flow in the LT8697’s V
IN
pins, PGND pins, and the
input capacitors (C
IN1
and C
IN2
). The loop formed by the
input capacitor should be as small as possible by placing
the capacitor adjacent to the V
IN
and PGND pins. When
using a physically large input capacitor the resulting loop
may become too large in which case using a small case/
value capacitor placed close to the V
IN
and PGND pins
plus a larger capacitor further away is preferred. These
components, along with the inductor and output capacitor,
should be placed on the same side of the circuit board,
and their connections should be made on that layer. Place
a local ground plane under the application circuit on the
layer closest to the surface layer. The SW and BST nodes
should be as small as possible. Finally, keep the USB5V
and RT nodes small so that the ground traces will shield
them from the SW and BST nodes. The exposed
pad on
the bottom of the package must be soldered to ground so
that the pad is connected to ground electrically and also
APPLICATIONS INFORMATION
acts as a heat sink thermally. To keep thermal resistance
low, extend the ground plane as much as possible, and
add thermal vias under and near the LT8697 to additional
ground planes within the circuit board and on the bottom
side.
High Temperature Considerations
For applications with higher ambient temperatures, lay
out the PCB to ensure good heat sinking of the LT8697.
The exposed pad on the bottom of the package must be
soldered to a ground plane. This ground should be tied
to large copper layers below with thermal vias; these
layers will spread heat dissipated by the LT8697. Placing
additional vias can reduce thermal resistance further. The
maximum load current should be derated as the ambient
temperature approaches the maximum junction rating.
Power dissipation within the LT8697 can be estimated
by calculating the total power loss from an efficiency
measurement and subtracting the inductor loss. The
die temperature is calculated by multiplying the LT8697
power dissipation by the thermal resistance from junction
to ambient. The LT8697 will stop switching and indicate
a
fault condition if safe junction temperature is exceeded.

LT8697HUDD#PBF

Mfr. #:
Manufacturer:
Analog Devices / Linear Technology
Description:
Switching Voltage Regulators USB 5V 2.5A Output, 42V Inpuut Synchronous Step-Down Regulator with Cable Drop Compensation
Lifecycle:
New from this manufacturer.
Delivery:
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