LT8697
13
8697fb
For more information www.linear.com/LT8697
APPLICATIONS INFORMATION
Cable Drop Compensation
The LT8697 includes the necessary circuitry to implement
cable drop compensation. Cable drop compensation allows
the regulator to maintain 5V regulation on the USB V
LOAD
despite high cable resistance. The LT8697 increases its
local output voltage V
OUT
above 5V as the load increases
to keep V
LOAD
regulated to 5V. This compensation does
not require running an additional pair of Kelvin sense
wires from the regulator to the load, but does require the
system designer to know the cable resistance R
CABLE
as
the LT8697 does not sense this value.
Program the cable drop compensation using the follow
-
ing ratio:
R
CBL
= 20.55 •
SENSE
CDC
R
where R
CDC
is a resistor tied between the regulator output
and the USB5V pin, R
CBL
is a resistor tied between the
RCBL pin and GND, R
SENSE
is the sense resistor tied be-
tween the ISP and ISN pins in series between the regulator
output
and the load, and R
CABLE
is the cable resistance.
R
SENSE
is typically chosen based on the desired current
limit and is typically 20mΩ for 2.1A systems and 50mΩ
for 0.9A. See the Setting the Current Limit section for
more information.
The current flowing into the USB5V pin through R
CDC
is
identical to the current flowing out of the R
CBL
resistor.
While the ratio of these two resistors should be chosen per
the equation above, choose the absolute values of these
resistors to keep this current between 30µA and 200µA at
full load current. This restriction results in R
CBL
and R
CDC
values between 5k and 33k. If I
USB5V
is too low, capacitive
loading on the USB5V and RCBL pins will degrade the load
step transient performance of the regulator. If I
USB5V
is
too high, the RCBL pin will go into current limit and the
cable drop compensation
feature will not work.
Capacitance across
the remote load to ground downstream
of R
SENSE
forms a zero in the LT8697’s feedback loop
due to cable drop compensation. C
CDC
reduces the cable
drop compensation gain at high frequency. The 1nF C
CDC
capacitor tied across the 10k R
CDC
is required for stability
of the LT8697’s output. If R
CDC
is changed, C
CDC
should
also be changed to maintain roughly the same 10µs RC
time constant. If the capacitance across the remote load
is large compared to the LT8697 output capacitor tied to
the SYS pin, a longer R
CDC
• C
CDC
time constant may be
necessary for stability depending on the amount of cable
drop compensation used. Output stability should always
be verified in the end application circuit.
The LT8697 limits the maximum voltage of V
OUT
by
limiting the voltage on the SYS pin V
SYS
to 5.8V. If the
cable drop compensation is programmed to compensate
for more than 0.8V of cable drop at the maximum I
LOAD
,
this V
SYS
maximum will prevent V
OUT
from rising higher
and the voltage at the point of load will drop below 5V.
The following equation shows how to
derive the LT8697
output voltage V
OUT
:
V
OUT
= 5V+
LOAD
SENSE
CDC
R
As stated earlier, the LT8697’s cable drop compensation
feature does not allow V
OUT
to exceed the SYS regula-
tion point of 5.8V. If additional impedance is placed in
between
the SYS pin and the OUT node such as R
SENSE
or a USB Switch, the voltage drop through these imped-
ances at
the maximum I
LOAD
must also be factored in to
this maximum allowable V
OUT
value. Refer to Figure 1
for load lines of V
OUT
and V
LOAD
to see how cable drop
compensation works.
Figure 1. Cable Drop Compensation Load Line
LOAD CURRENT (A)
0
4.8
VOLTAGE (V)
5.2
5.6
5.0
5.4
6.0
5.8
1 2
8697 F01
30.5 1.5 2.5
V
LOAD
V
OUT
R
CABLE
= 0.3Ω
R
SENSE
= 20mΩ
R
CDC
= 10kΩ
R
CBL
= 13.7kΩ
