IDT
TM
/ICS
TM
PC MAIN CLOCK 1397—11/08/10
ICS9LP525-2
PC MAIN CLOCK
19
Ordering Information
9LP525
BF-2LFT
Example:
Designation for tape and reel packaging
Lead Free, RoHS Compliant
Package Type
F = SSOP
Revision Designator (will not correlate with datasheet revision)
Device Type (consists of 3 to 7 digit numbers)
XXXX B F LF T
MIN
MAX
MIN
MAX
A
2.41
2.80
.095
.110
A1
0.20
0.40
.008
.016
b
0.20
0.34
.008
.0135
c
0.13
0.25
.005
.010
D
E
10.03
10.68
.395
.420
E1
7.40
7.60
.291
.299
e
h
0.38
0.64
.015
.025
L
0.50
1.02
.020
.040
N
α
VARIATIONS
MIN
MAX
MIN
MAX
56
18.31
18.55
.720
.730
10-0034
0.635 BASIC 0.025 BASIC
COMMON DIMENSIONS
In Millimeters In Inches
COMMON DIMENSIONS
Reference Doc.: JEDEC Publication 95, MO-118
56-Lead, 300 mil Body, 25 mil, SSOP
N
SEE VARIATIONS SEE VARIATIONS
D mm. D (inch)
SYMBOL
SEE VARIATIONS SEE VARIATIONS
IDT
TM
/ICS
TM
PC MAIN CLOCK 1397—11/08/10
ICS9LP525-2
PC MAIN CLOCK
20
INDEX
AREA
12
N
D
E1
E
a
SEATING
PLANE
A1
A
A2
e
-C-
b
c
L
aaa C
MIN MAX MIN MAX
A -- 1.20 -- .047
A1 0.05 0.15 .002 .006
A2 0.80 1.05 .032 .041
b 0.17 0.27 .007 .011
c 0.09 0.20 .0035 .008
D
E
E1 6.00 6.20 .236 .244
e
L 0.45 0.75 .018 .030
N
α
8°
aaa -- 0.10 -- .004
VARIATIONS
MIN MAX MIN MAX
56 13.90 14.10 .547 .555
10-0039
56-Lead 6.10 mm. Body, 0.50 mm. Pitch TSSOP
(240 mil) (20 mil)
SYMBOL
In Millimeters
In Inches
COMMON DIMENSIONS COMMON DIMENSIONS
SEE VARIATIONS
SEE VARIATIONS
8.10 BASIC 0.319 BASIC
0.50 BASIC 0.020 BASIC
SEE VARIATIONS
SEE VARIATIONS
N
D mm. D (inch)
Reference Doc.: JEDEC Publication 95, M O-153
Ordering Information
9LP525
BG-2LFT
Example:
Designation for tape and reel packaging
Lead Free, RoHS Compliant
Package Type
G = TSSOP
Revision Designator (will not correlate with datasheet revision)
Device Type (consists of 3 to 7 digit numbers)
XXXX B G LF T
ICS9LP525-2
PC MAIN CLOCK
21
Innovate with IDT and accelerate your future networks. Contact:
www.IDT.com
For Sales
800-345-7015
408-284-8200
Fax: 408-284-2775
For Tech Support
408-284-6578
pcclockhelp@idt.com
Corporate Headquarters
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United States
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+408 284 8200 (outside U.S.)
Asia Pacific and Japan
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Europe
IDT Europe, Limited
Prime House
Barnett Wood Lane
Leatherhead, Surrey
United Kingdom KT22 7DE
+44 1372 363 339
© 2006 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice. IDT and the IDT logo are trademarks of Integrated
Device Technology, Inc. Accelerated Thinking is a service mark of Integrated Device Technology, Inc. All other brands, product names and marks are or may be trademarks
or registered trademarks used to identify products or services of their respective owners.
Printed in USA
TM
Revision History
Rev. Issue Date Description Page #
A 6/23/2008 Going to Release -
B 8/8/2008
1. Updated Pin Description
2. Added Byte 29 for Slew Rate control 2-3, 17
C 10/10/2008
1)
Byte 11, bit 5 is now reserved.
2) Byte 29, bits 7:6 default to 0.8X slew rate (‘10’)
3) Removed reference to STOP drive mode in Power management table.
4) Corrected REF slew rate control from Byte 29b3 to Byte 29b2.
5) Clarified description of Byte 11, bits 2 and 3 to reflect CK505 ME clock selection table.
6) Marked as Reserved all bits that are not in the 56-pin version of the device Various
D 4/28/2009
1) updated tables 2, 6 and 7 to clarify interaction of Config Modes with SRC1
2) Updated ordering revision to A.
10, 11,
19, 20
E 4/30/2009 Updated ordering revision. 19,20
F 11/8/2010 Removed last time buy statement 1

9LP525BF-2LFT

Mfr. #:
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner CK505 PCIe Gen2
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

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