NCV7342
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4
Mode &
Wake−up
Control
Wake−up
Filter
STB
GND
RxD
2
3
7
6
COMP
COMP
5
Timer
TxD
1
Driver
Control
Thermal
Shutdown
8
4
CANH
CANL
NCV7342−3
Figure 2. NCV7342−3 Block Diagram
RB 20121109
V
CC
V
IO
V
IO
V
IO
NCV7342
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5
TYPICAL APPLICATION
NCV7342−3
STB
RxD
TxD
1
4
Micro
Controller
GND
VBAT
5V−reg
GND
2
5
8
CANH
CANL
3
6
7
CAN
BUS
3V−reg
RB20120816
R
LT
= 60 W
R
LT
= 60 W
Figure 3. Application Diagram NCV7342−3
NCV7342−0
STB
RxD
TxD
1
4
Micro
Controller
GND
VBAT
5V−reg
IN OUT
GND
2
3
8
CANH
CANL
5
6
7
CAN
BUS
RB20120816
V
SPLIT
R
LT
= 60 W
R
LT
= 60 W
C
LT
= 4.7 nF
Figure 4. Application Diagram NCV7342−0
C
LT
= 4.7 nF
V
IO
V
IO
V
CC
V
CC
V
CC
Table 2. PIN FUNCTION DESCRIPTION
Pin Name Description
1 TxD
Transmit data input; Low input Ù dominant driver; internal pull−up current
2 GND Ground
3 V
CC
Supply voltage
4 RxD
Receive data output; dominant transmitter Ù Low output
5
5
V
IO
V
SPLIT
Input/Output pins supply voltage. On NCV7342−3 only
Common−mode stabilization output. On NCV7342−0 only
6 CANL Low−level CAN bus line (Low in dominant mode)
7 CANH High−level CAN bus line (High in dominant mode)
8 STB Standby mode control input
EP Exposed Pad Connect to GND or left floating
NCV7342
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6
FUNCTIONAL DESCRIPTION
NCV7342 has two versions which differ from each other
only by function of pin 5.
NCV7342−0: Pin 5 is common mode stabilization output
V
SPLIT
. (see Figure 4) This version is full replacement of
NCV7340.
NCV7342−3: Pin 5 is V
IO
pin, which is supply pin for
transceiver digital inputs/output (supplying pins TxD, RxD,
STB) The V
IO
pin should be connected to microcontroller
supply pin. By using V
IO
supply pin shared with
microcontroller, the I/O levels between microcontroller and
transceiver are properly adjusted. This adjustment allows
communication between 3 V microcontroller and the
transceiver. (See Figure 3)
Operating Modes
NCV7342 provides two modes of operation as illustrated
in Table 3. These modes are selectable through pin STB.
Table 3. OPERATING MODES
Pin
STB
Mode
Pin RxD
Low High
Low Normal Bus dominant Bus recessive
High Standby Wake−up
request
detected
No wake−up
request detected
Normal Mode
In normal mode, the transceiver is able to communicate
via the bus lines. The signals are transmitted and received to
the CAN controller via the pins TxD and RxD. The slopes
on the bus lines outputs are optimized to give extremely low
EME.
Standby Mode
In standby mode both the transmitter and receiver are
disabled and a very low−power differential receiver
monitors the bus lines for CAN bus activity. The bus lines
are terminated to ground and supply current is reduced to a
minimum, typically 10 mA. When a wake−up request is
detected by the low−power differential receiver, the signal
is first filtered and then verified as a valid wake signal after
a time period of t
dwakerd
. The RxD pin is driven Low by the
transceiver to inform the controller of the wake−up request.
V
IO
Supply Pin
The V
IO
pin (available only on NCV7342−3 version)
should be connected to microcontroller supply pin. By using
V
IO
supply pin shared with microcontroller the I/O levels
between microcontroller and transceiver are properly
adjusted. See Figure 3. Pin V
IO
also provides the internal
supply voltage for low−power differential receiver of the
transceiver. This allows detection of wake−up request even
when there is no supply voltage on Pin V
CC
.
Split Circuit
The V
SPLIT
pin (available on NCV7342−0 version) is
operational only in normal mode. In standby mode this pin
is floating. The V
SPLIT
can be connected as shown in
Figure 4 or, if it’s not used, can be left floating. Its purpose
is to provide a stabilized DC voltage of 0.5 · V
CC
to the bus
reducing possible steps in the common−mode signal,
therefore reducing EME. These unwanted steps could be
caused by an unpowered node on the network with excessive
leakage current from the bus that shifts the recessive voltage
from its nominal 0.5 · V
CC
voltage.
Wake−up
When a valid wake−up (dominant state longer than t
Wake
)
is received during the standby mode, the RxD pin is driven
Low after t
dwakerd
. The wake−up detection is not latched:
RxD returns to High state after t
dwakedr
when the bus signal
is released back to recessive – see Figure 5.
CANH
CANL
STB
RxD1
time
normal standby
Figure 5. NCV7342 Wake−up behavior
>t
Wake
<t
Wake
t
dwakerd
t
dwakedr
t
Wake(RxD)

NCV7342D10R2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
CAN Interface IC High Speed Low Pwr CAN Transceiver
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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