ADP3650
Rev. A | Page 3 of 12
SPECIFICATIONS
VCC = 12 V, BST = 4 V to 26 V, T
A
= −40°C to +85°C, unless otherwise noted.
1
Table 1.
Parameter Symbol Test Conditions/Comments Min Typ Max Unit
DIGITAL INPUTS (IN, OD)
Input Voltage High 2.0 V
Input Voltage Low 0.8 V
Input Current −1 +1 μA
Hysteresis 40 250 350 mV
HIGH-SIDE DRIVER
Output Resistance, Sourcing Current BST − SW = 12 V; T
A
= 25°C 3.3 Ω
BST − SW = 12 V; T
A
= −40°C to +85°C 2.5 3.9 Ω
Output Resistance, Sinking Current BST − SW = 12 V; T
A
= 25°C 1.8 Ω
BST − SW = 12 V; T
A
= −40°C to +85°C 1.4 2.6 Ω
Output Resistance, Unbiased BST − SW = 0 V 10 kΩ
Transition Times t
rDRVH
BST − SW = 12 V, C
LOAD
= 3 nF, see Figure 3 25 40 ns
t
fDRVH
BST − SW = 12 V, C
LOAD
= 3 nF, see Figure 3 20 30 ns
Propagation Delay Times t
pdhDRVH
BST − SW = 12 V, C
LOAD
= 3 nF, 32 45 70 ns
25°C ≤ T
A
≤ 85°C, see Figure 3
t
pdlDRVH
BST − SW = 12 V, C
LOAD
= 3 nF, see Figure 3 25 35 ns
OD
pdl
t
See Figure 2 20 35 ns
OD
pdh
t
See Figure 2 40 55 ns
SW Pull-Down Resistance SW to PGND 10 kΩ
LOW-SIDE DRIVER
Output Resistance, Sourcing Current T
A
= 25°C 3.3 Ω
T
A
= −40°C to +85°C 2.4 3.9 Ω
Output Resistance, Sinking Current T
A
= 25°C 1.8 Ω
T
A
= −40°C to +85°C 1.4 2.6 Ω
Output Resistance, Unbiased VCC = PGND 10 kΩ
Transition Times
t
rDRVL
C
LOAD
= 3 nF, see Figure 3 20 35 ns
t
fDRVL
C
LOAD
= 3 nF, see Figure 3 16 30 ns
Propagation Delay Times t
pdhDRVL
C
LOAD
= 3 nF, see Figure 3 12 35 ns
t
pdlDRVL
C
LOAD
= 3 nF, see Figure 3 30 45 ns
OD
pdl
t
See Figure 2 20 35 ns
OD
pdh
t
See Figure 2 110 190 ns
Timeout Delay SW = 5 V 110 190 ns
SW = PGND 95 150 ns
SUPPLY
Supply Voltage Range V
CC
4.15 13.2 V
Supply Current I
SYS
BST = 12 V, IN = 0 V 2 5 mA
UVLO Voltage V
CC
rising 1.5 3.0 V
Hysteresis 350 mV
1
All limits at temperature extremes are guaranteed via correlation using standard statistical quality control (SQC) methods.
