IDT
®
Frequency Gearing Clock for CPU, PCIe Gen1, Gen2 & FBD 1138C 02/08/10
ICS9FG1200D-1
19
Co mmon Recommend ations for Differential Rout ing Dim ension or Value Unit Figure
L1 length, route as non-coupled 50ohm trace 0.5 max inch 1
L2 length, route as non-coupled 50ohm trace 0.2 max inch 1
L3 length, route as non-coupled 50ohm trace 0.2 max inch 1
Rs 33 ohm 1
Rt 49.9 ohm 1
Down Device Differential Routing
L4 lengt h, route as coupled microstrip 100ohm differential trace 2 min to 16 max inch 1
L4 length, route as coupled stripline 100ohm differential trace 1 .8 min to 14.4 max inch 1
Differential Routing to PCI Express Conn ector
L4 length, route as coupled microstrip 100ohm differential trace 0.25 to 14 max inch 2
L4 length, route as coupled stripline 100ohm differential trace 0 .225 min to 12.6 max inch 2
SRC Reference Clock
HCSL Output Buffer
L1
L1'
Rs
L2
L2'
Rs
L4'
L4
L3L3'
Rt Rt
PCI Express
Down Device
REF_CLK Input
Figure 1: Down Device Routing
HCSL Output Buffer
L1
L1'
Rs
L2
L2'
Rs
L4'
L4
L3L3'
Rt Rt
PCI Express
Add-in Board
REF_CLK Input
Figure 2: PCI Express Connector Routing
