1
LTC1749
1749f
12-Bit, 80Msps
Wide Bandwidth ADC
Sample Rate: 80Msps
PGA Front End (2.25V
P-P
or 1.35V
P-P
Input Range)
71.8dB SNR and 87dB SFDR (PGA = 0)
70.2dB SNR and 87dB SFDR (PGA = 1)
500MHz Full Power Bandwidth S/H
No Missing Codes
Single 5V Supply
Power Dissipation: 1.45W
Two Pin Selectable Reference Values
Data Ready Output Clock
Pin Compatible 14-Bit 80Msps Device (LTC1750)
48-Pin TSSOP Package
Direct IF Sampling
Telecommunications
Receivers
Cellular Base Stations
Spectrum Analysis
Communications Test Equipment
Undersampling
, LTC and LT are registered trademarks of Linear Technology Corporation.
The LTC
®
1749 is an 80Msps, 12-bit A/D converter de-
signed for digitizing wide dynamic range signals up to
frequencies of 500MHz. The input range of the ADC can be
optimized with the on-chip PGA sample-and-hold circuit
and flexible reference circuitry.
The LTC1749 has a highly linear sample-and-hold circuit
with a bandwidth of 500MHz. The SFDR is 80dB with an
input frequency of 250MHz. Ultralow jitter of 0.15ps
RMS
allows undersampling of IF frequencies with minimal
degradation in SNR. DC specs include ±1LSB INL and no
missing codes.
The digital interface is compatible with 5V, 3V, 2V and
LVDS logic systems. The ENC and ENC inputs may be
driven differentially from PECL, GTL and other low swing
logic families or from single-ended TTL or CMOS. The low
noise, high gain ENC and ENC inputs may also be driven
by a sinusoidal signal without degrading performance. A
separate output power supply can be operated from 0.5V
to 5V, making it easy to connect directly to low voltage
DSPs or FIFOs.
The 48-pin TSSOP package with a flow-through pinout
simplifies the board layout.
80Msps, 12-Bit ADC with a 2.25V Differential Input Range
DESCRIPTIO
U
FEATURES
APPLICATIO S
U
BLOCK DIAGRA
W
12-BIT
PIPELINED ADC
12
S/H
CIRCUIT
±1.125V
DIFFERENTIAL
ANALOG INPUT
A
IN
+
PGA
A
IN
SENSE
V
CM
4.7µF
DIFF AMP
REFLA REFHB
GND
1749 BD
ENC
4.7µF
1µF1µF
0.1µF0.1µF
REFHAREFLB
BUFFER
RANGE
SELECT
2V
REF
CORRECTION
LOGIC AND
SHIFT
REGISTER
OUTPUT
LATCHES
CONTROL LOGIC
OV
DD
V
DD
OGND
0.5V TO 5V
5V
0.1µF
1µF 1µF 1µF
D11
D0
CLKOUT
ENC
DIFFERENTIAL
ENCODE INPUT
MSBINV
0.1µF
2
LTC1749
1749f
PARAMETER CONDITIONS MIN TYP MAX UNITS
Resolution (No Missing Codes) 12 Bits
Integral Linearity Error (Note 6) 1.0 ±0.4 1.0 LSB
–1.5 1.5 LSB
Differential Linearity Error 0.8 ±0.2 0.8 LSB
Offset Error (Note 7) External Reference (V
SENSE
= 1.125V, PGA = 0) –35 ±835 mV
Gain Error External Reference (V
SENSE
= 1.125V, PGA = 0) –3.5 ±1 3.5 %FS
Full-Scale Tempco Internal Reference ±40 ppm/°C
External Reference (V
SENSE
= 1.125V) ±20 ppm/°C
Offset Tempco ±20 µV/°C
Input Referred Noise (Transition Noise) V
SENSE
= 1.125V, PGA = 0 0.23 LSB
RMS
ORDER PART
NUMBER
OV
DD
= V
DD
(Notes 1, 2)
Supply Voltage (V
DD
)............................................. 5.5V
Analog Input Voltage (Note 3) ....0.3V to (V
DD
+ 0.3V)
Digital Input Voltage (Note 4) .....0.3V to (V
DD
+ 0.3V)
Digital Output Voltage................. 0.3V to (V
DD
+ 0.3V)
OGND Voltage..............................................0.3V to 1V
Power Dissipation............................................ 2000mW
Operating Temperature Range
LTC1749C ............................................... 0°C to 70°C
LTC1749I............................................ – 40°C to 85°C
Storage Temperature Range ................. 65°C to 150°C
Lead Temperature (Soldering, 10 sec)..................300°C
LTC1749CFW
LTC1749IFW
T
JMAX
= 150°C, θ
JA
= 35°C/W
The indicates specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. (Note 5)
ABSOLUTE MAXIMUM RATINGS
W
WW
U
PACKAGE/ORDER INFORMATION
W
U
U
CO VERTER CHARACTERISTICS
U
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
V
IN
Analog Input Range (Note 8) 4.75V V
DD
5.25V ±0.7 to ±1.125 V
I
IN
Analog Input Leakage Current 0 < A
IN
+
, A
IN
< V
DD
–1 1 µA
C
IN
Analog Input Capacitance Sample Mode ENC < ENC 6.9 pF
Hold Mode ENC > ENC 2.4 pF
t
ACQ
Sample-and-Hold Acquisition Time 56ns
t
AP
Sample-and-Hold Acquisition Delay Time 0 ns
t
JITTER
Sample-and-Hold Acquisition Delay Time Jitter 0.15 ps
RMS
CMRR Analog Input Common Mode Rejection Ratio 1.5V < (A
IN
= A
IN
+
) < 3V 80 dB
The indicates specifications which apply over the full operating temperature range, otherwise
specifications are at T
A
= 25°C. (Note 5)
A ALOG I PUT
UU
Consult LTC Marketing for parts specified with wider operating temperature ranges.
1
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4
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10
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12
13
14
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24
TOP VIEW
FW PACKAGE
48-LEAD PLASTIC TSSOP
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
SENSE
V
CM
GND
A
IN
+
A
IN
GND
V
DD
V
DD
GND
REFLB
REFHA
GND
GND
REFLA
REFHB
GND
V
DD
V
DD
GND
V
DD
GND
MSBINV
ENC
ENC
OF
OGND
D11
D10
D9
OV
DD
D8
D7
D6
D5
OGND
GND
GND
D4
D3
D2
OV
DD
D1
D0
NC
NC
OGND
CLKOUT
PGA
3
LTC1749
1749f
PARAMETER CONDITIONS MIN TYP MAX UNITS
V
CM
Output Voltage I
OUT
= 0 1.95 2 2.05 V
V
CM
Output Tempco I
OUT
= 0 ±30 ppm/°C
V
CM
Line Regulation 4.75V V
DD
5.25V 3 mV/V
V
CM
Output Resistance 1mA I
OUT
1mA 4
(Note 5)
I TER AL REFERE CE CHARACTERISTICS
UU U
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
SNR Signal-to-Noise Ratio 5MHz Input Signal (PGA = 0) 71.8 dB
5MHz Input Signal (PGA = 1) 70.2 dB
30MHz Input Signal (PGA = 0) 70.5 71.7 dB
30MHz Input Signal (PGA = 1) 70.2 dB
70MHz Input Signal (PGA = 0) 71.4 dB
70MHz Input Signal (PGA = 1) 68.8 70.1 dB
140MHz Input Signal (PGA = 1) 69.8 dB
250MHz Input Signal (PGA = 1) 69.3 dB
350MHz Input Signal (PGA = 1) 67.4 dB
SFDR Spurious Free Dynamic Range 5MHz Input Signal (PGA = 0) 87 dB
5MHz Input Signal (PGA = 1) 87 dB
30MHz Input Signal (PGA = 0) (HD2 and HD3) 76 87 dB
30MHz Input Signal (PGA = 0) (Other) 83 90 dB
70MHz Input Signal (PGA = 0) 85 dB
70MHz Input Signal (PGA = 1) (HD2 and HD3) 76 87 dB
70MHz Input Signal (PGA = 1) (Other) 83 90 dB
140MHz Input Signal (PGA = 1) 84 dB
250MHz Input Signal (PGA = 1) 80 dB
350MHz Input Signal (PGA = 1) 74 dB
S/(N + D) Signal-to-(Noise + Distortion) Ratio 5MHz Input Signal (PGA = 0) 71.7 dB
5MHz Input Signal (PGA = 1) 70.1 dB
30MHz Input Signal (PGA = 0) 71.6 dB
30MHz Input Signal (PGA = 1) 70.0 dB
70MHz Input Signal (PGA = 0) 71.2 dB
70MHz Input Signal (PGA = 1) 69.9 dB
250MHz Input Signal (PGA = 1) 68.6 dB
THD Total Harmonic Distortion 5MHz Input Signal, First 5 Harmonics (PGA = 0) 87 dB
5MHz Input Signal, First 5 Harmonics (PGA = 1) 87 dB
30MHz Input Signal, First 5 Harmonics (PGA = 0) 87 dB
30MHz Input Signal, First 5 Harmonics (PGA = 1) 87 dB
70MHz Input Signal, First 5 Harmonics (PGA = 0) 85 dB
70MHz Input Signal, First 5 Harmonics (PGA = 1) 87 dB
250MHz Input Signal (PGA = 1) 78 dB
IMD Intermodulation Distortion f
IN1
= 2.52MHz, f
IN2
= 5.2MHz (PGA = 0) 87 dBc
f
IN1
= 2.52MHz, f
IN2
= 5.2MHz (PGA = 1) 87 dBc
Sample-and-Hold Bandwidth R
SOURCE
= 50 500 MHz
T
A
= 25°C, A
IN
= –1dBFS (Note 5), V
SENSE
= V
DD
DY A IC ACCURACY
UW

LTC1749IFW#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 12-B, 80Msps Wide B&width ADC
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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