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LTC1749IFW#PBF

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
7
LTC1749
1749f
TYPICAL PERFOR A CE CHARACTERISTICS
UW
8192 Point FFT, f
IN
= 250.2MHz,
–10dB, PGA = 1
8192 Point FFT, f
IN
= 250.2MHz,
–20dB, PGA = 1
8192 Point 2-Tone FFT, 25.01MHz
and 30.1MHz, –7dB, PGA = 0
SFDR vs 30.2MHz Input Level,
PGA = 0
SFDR vs 140.2MHz, Input Level,
PGA = 1
FREQUENCY (MHz)
0
AMPLITUDE (dBFS)
–60
–30
–20
40
1749 G16
–70
–80
–120
10
20
30
5
15
25
35
–100
0
–10
–40
–50
–90
–110
FREQUENCY (MHz)
0
AMPLITUDE (dBFS)
–60
–30
–20
40
1749 G17
–70
–80
–120
10
20
30
5
15
25
35
–100
0
–10
–40
–50
–90
–110
FREQUENCY (MHz)
0
AMPLITUDE (dBFS)
–60
–30
–20
40
1749 G18
–70
–80
–120
10
20
30
5
15
25
35
–100
0
–10
–40
–50
–90
–110
8192 Point 2-Tone FFT, 65.01MHz
and 70.01MHz, –7dB, PGA = 0
FREQUENCY (MHz)
0
AMPLITUDE (dBFS)
–60
–30
–20
40
1749 G19
–70
–80
–120
10
20
30
5
15
25
35
–100
0
–10
–40
–50
–90
–110
INPUT LEVEL (dBFS)
–80
0
SFDR (dBc AND dBFS)
20
40
60
80
–70 –60 –50 –40
1749 G20
–30 0
100
10
30
50
70
90
110
–20 –10
SFDR vs 70.2MHz, Input Level,
PGA = 0
INPUT LEVEL (dBFS)
–80
0
SFDR (dBc AND dBFS)
20
40
60
80
–70 –60 –50 –40
1749G21
–30 0
100
10
30
50
70
90
110
–20 –10
INPUT LEVEL (dBFS)
–80
0
SFDR (dBc AND dBFS)
20
40
60
80
–60 –40
–20
0
1749 G22
100
120
–70 –50
–30
–10
SFDR vs 250.2MHz, Input Level
SNR vs Input Frequency and
Amplitude, PGA = 0
INPUT LEVEL (dBFS)
–80
0
SFDR (dBc AND dBFS)
20
40
60
80
–60 –40
–20
0
1749 G23
100
120
–70 –50
–30
–10
INPUT FREQUENCY (MHz)
0
SNR (dBFS)
69.5
70.0
70.5
150
250
1749 G24
69.0
68.5
68.0
50 100 200
71.0
71.5
72.0
300
–1dB
–10dB
–20dB
8
LTC1749
1749f
TYPICAL PERFOR A CE CHARACTERISTICS
UW
SNR vs Input Frequency and
Amplitude, PGA = 1
SFDR (HD2 and HD3) vs Input
Frequency and Amplitude,
PGA = 0
INPUT FREQUENCY (MHz)
0
SNR (dBFS)
69.0
70.0
71.0
400
1749 G25
68.0
67.0
68.5
69.5
70.5
67.5
66.5
66.0
100
200
300
500
–1dB
–10dB
–20dB
INPUT FREQUENCY (MHz)
0
60
SFDR (dBFS)
70
80
90
–1dB
–10dB
–20dB
100
50 100 150 200
1749 G26
250 300
SFDR (HD2 and HD3) vs Input
Frequency and Amplitude,
PGA = 1
INPUT FREQUENCY (MHz)
0
SFDR (dBFS)
80
90
100
–1dB
–10dB
–20dB
400
1749 G27
70
60
50
100
200
300
500
SFDR and SNR vs Sample Rate,
15.2MHz, –1dB Input
SAMPLE RATE (Msps)
0
SFDR AND SNR (dBFS)
75
80
85
60
SFDR
SNR
100
1749 G28
70
65
60
20 40 80
90
95
100
120
SFDR and SNR vs V
DD
, 15.2MHz,
–1dB Input
V
DD
(V)
4.1
SFDR AND SNR (dBFS)
95
4.7
1749 G29
80
70
4.3 4.5 4.9
SFDR
SNR
65
60
100
90
85
75
5.1 5.3 5.5
Supply Current vs Sample Rate
SAMPLE RATE (Msps)
0
290
300
310
80
1749 G30
280
270
20 40 60 100
260
250
240
SUPPLY CURRENT (mA)
9
LTC1749
1749f
UU
U
PI FU CTIO S
SENSE (Pin 1): Reference Sense Pin. GND selects a V
REF
of 0.7V. V
DD
selects 1.125V. When V
SENSE
is between 0.7V
and 1.125V, V
SENSE
is used as V
REF
. The ADC input range
is ±V
REF
/PGA gain.
V
CM
(Pin 2): 2.0V Output and Input Common Mode Bias.
Bypass to ground with 4.7µF ceramic chip capacitor.
GND (Pins 3, 6, 9, 12, 13, 16, 19, 21, 36, 37): ADC Power
Ground.
A
IN
+
(Pin 4): Positive Differential Analog Input.
A
IN
–
(Pin 5): Negative Differential Analog Input.
V
DD
(Pins 7, 8, 17, 18, 20): 5V Supply. Bypass to AGND
with 1µF ceramic chip capacitors at Pin 8 and Pin 18.
REFLB (Pin 10): ADC Low Reference. Bypass to Pin 11
with 0.1µF ceramic chip capacitor. Do not connect to
Pin␣ 14.
REFHA (Pin 11): ADC High Reference. Bypass to Pin 10 with
0.1µF ceramic chip capacitor, to Pin 14 with a 4.7µF ceramic
capacitor and to ground with 1µF ceramic capacitor.
REFLA (Pin 14): ADC Low Reference. Bypass to Pin 15 with
0.1µF ceramic chip capacitor, to Pin 11 with a 4.7µF ce-
ramic capacitor and to ground with 1µF ceramic capacitor.
REFHB (Pin 15): ADC High Reference. Bypass to Pin 14
with 0.1µF ceramic chip capacitor. Do not connect to
Pin␣ 11.
MSBINV (Pin 22): MSB Inversion Control. Low inverts the
MSB, 2’s complement output format. High does not invert
the MSB, offset binary output format.
ENC (Pin 23): Encode Input. The input sample starts on the
positive edge.
ENC (Pin 24): Encode Complement Input. Conversion
starts on the negative edge. Bypass to ground with 0.1µF
ceramic for single-ended ENCODE signal.
PGA (Pin 25): Programmable Gain Amplifier Control. Low
selects an effective front-end gain of 1. High selects an
effective gain of 1 2/3. The ADC input range is ±V
REF
/PGA
gain.
CLKOUT (Pin 26): Data Valid Output. Latch data on the
rising edge of CLKOUT.
OGND (Pins 27, 38, 47): Output Driver Ground.
NC (Pins 28, 29): No Internal Connection.
D0, D1 (Pins 30, 31): Digital Outputs.
OV
DD
(Pins 32, 43): Positive Supply for the Output Driv-
ers. Bypass to ground with 0.1µF ceramic chip capacitor.
D2-D4 (Pins 33 to 35): Digital Outputs.
D5-D8 (Pins 39 to 42): Digital Outputs.
D9-D11 (Pins 44 to 46): Digital Outputs.
OF (Pin 48): Over/Under Flow Output. High when an over
or under flow has occurred.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

LTC1749IFW#PBF

Mfr. #:
Buy LTC1749IFW#PBF
Manufacturer:
Analog Devices Inc.
Description:
Analog to Digital Converters - ADC 12-B, 80Msps Wide B&width ADC
Lifecycle:
New from this manufacturer.
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