13
LTC1749
1749f
Input Drive Circuits
The LTC1749 requires differential drive for the analog
inputs. A balanced input drive will minimize even order
harmonics that are due to nonlinear behavior of the input
drive circuits and the S/H circuit.
The S/H circuit of the LTC1749 is a switched capacitor
circuit (Figure 2). The input drive circuitry will see a
sampling glitch at the start of the sampling period, when
ENC/ENC falls. Although designed to be linear as possible,
a small fraction of this glitch is nonlinear and can result in
additional observed distortion if the input drive circuitry is
too slow. For most practical circuits the glitch nonlinearity
is more than 100dB below the fundamental. The glitch will
decay during the sampling period with a time constant
determined by the input drive and S/H circuitry.
For fast settling and wide bandwidth, a low drive imped-
ance is required. The S/H bandwidth is partially deter-
mined by the source impedance. The full 500MHz
bandwidth is valid for source impedance (each input) less
than 30Ω. Higher source impedance can be used but full
amplitude distortion will be better with a source imped-
ance less than 100Ω.
Transformers
Transformers provide a simple method for converting a
single-ended signal to a differential signal; however, they
have poor performance characteristics at low and high input
frequencies. The lower –3dB corner of RF transformers can
range from tens of kHz to tens of MHz. Operation near this
corner results in poor 2nd order harmonic performance
due to nonlinear transformer core behavior. The upper
–3dB corner can vary from tens of MHz to several GHz.
Operation near the upper corner can result in poor 2nd order
performance due to poor balance on the secondary.
Transformers should be selected to have –3dB corners at
least one octave away from the desired operating fre-
quency. Transformers with larger cores usually have
better performance at lower frequency and perform better
when driving heavy loads.
Figure 3a shows the LTC1749 being driven by an RF
transformer with a center tapped secondary. The second-
ary center tap is DC-biased with V
CM
, setting the ADC input
signal at its optimum DC level of 2V. In this example a 1:1
transformer is used; however, other transformer imped-
ance ratios may be substituted.
Figure 3b shows the use of a transformer without a center
tapped secondary. In this example the secondary is biased
with the addition of two resistors placed in series across
the secondary winding. The center tap of the secondary
resistors is connected to the ADC V
CM
output to set the DC
bias. This circuit is better suited for high input frequency
applications since center tapped transformers generally
have less bandwidth and poor balance at high frequencies
than noncenter tapped transformers.
APPLICATIO S I FOR ATIO
WUUU
Figure 3a. Single-Ended to Differential
Conversion Using a Transformer
1:1
25Ω
0.1µF
ANALOG
INPUT
100Ω 100Ω 12pF
12pF
12pF
1749 F03
4.7µF
25Ω
25Ω
25Ω
LTC1749
V
CM
A
IN
+
A
IN
–
1:4
10Ω
0.1µF
ANALOG
INPUT
100Ω
200Ω
200Ω
8.4pF
1749 F03b
10Ω
25Ω
25Ω
8.4pF
4.7µF
LTC1749
V
CM
A
IN
+
A
IN
–
Figure 3b. Using a Transformer
Without a Center Tapped Secondary
Active Drive Circuits
Active circuits, open loop or closed loop, can be used to
drive the ADC inputs. Closed-loop circuits such as op amps
have excellent DC and low frequency accuracy but have
poor high frequency performance. Figure 4 shows the dual
LT
®
1818 op amp used for single-ended to differential
signal conver
sion. Note that the two op amps do not have
the same noise gain, which can result in poor balance at
higher frequencies. The op amp configured in a gain of +1
