© Semiconductor Components Industries, LLC, 2015
June, 2018 Rev. 26
1 Publication Order Number:
CAT25010/D
CAT25010, CAT25020,
CAT25040
EEPROM Serial 1/2/4-Kb SPI
Description
The CAT25010/20/40 are a EEPROM Serial 1/2/4Kb SPI devices
internally organized as 128x8/256x8/512x8 bits. They feature a
16byte page write buffer and support the Serial Peripheral Interface
(SPI) protocol. The device is enabled through a Chip Select (CS
)
input. In addition, the required bus signals are a clock input (SCK),
data input (SI) and data output (SO) lines. The HOLD
input may be
used to pause any serial communication with the CAT25010/20/40
device. These devices feature software and hardware write protection,
including partial as well as full array protection.
Features
20 MHz (5 V) SPI Compatible
1.8 V to 5.5 V Supply Voltage Range
SPI Modes (0,0) & (1,1)
16byte Page Write Buffer
Selftimed Write Cycle
Hardware and Software Protection
Block Write Protection
Protect 1/4, 1/2 or Entire EEPROM Array
Low Power CMOS Technology
1,000,000 Program/Erase Cycles
100 Year Data Retention
Industrial and Extended Temperature Range
PDIP, SOIC, TSSOP 8Lead and UDFN 8Pad Packages
These Devices are PbFree, Halogen Free/BFR Free, and RoHS
Compliant
SI
SO
CAT25010
CAT25020
CAT25040
SCK
V
SS
V
CC
CS
WP
HOLD
Figure 1. Functional Symbol
www.onsemi.com
PIN CONFIGURATION
SI
HOLD
V
CC
V
SS
WP
SO
CS
1
See detailed ordering and shipping information in the package
dimensions section on page 10 of this data sheet.
ORDERING INFORMATION
SOIC8
V SUFFIX
CASE 751BD
SCK
SOIC (V), TSSOP (Y), UDFN (HU4)
TSSOP8
Y SUFFIX
CASE 948AL
Chip SelectCS
Serial Data OutputSO
Write ProtectWP
GroundV
SS
Serial Data InputSI
Serial ClockSCK
FunctionPin Name
PIN FUNCTION
Hold Transmission InputHOLD
Power SupplyV
CC
UDFN8
HU4 SUFFIX
CASE 517AZ
For the location of Pin 1, please consult the
corresponding package drawing.
CAT25010, CAT25020, CAT25040
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2
Table 1. ABSOLUTE MAXIMUM RATINGS
Parameters Ratings Units
Operating Temperature 45 to +130 °C
Storage Temperature 65 to +150 °C
Voltage on any Pin with Respect to Ground (Note 1) 0.5 to V
CC
+ 0.5 V
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
Table 2. RELIABILITY CHARACTERISTICS (Note 2)
Symbol Parameter Min Units
N
END
(Note 3) Endurance 1,000,000 Program / Erase Cycles
T
DR
Data Retention 100 Years
Table 3. D.C. OPERATING CHARACTERISTICS
(V
CC
= 1.8 V to 5.5 V, T
A
= 40°C to +85°C and V
CC
= 2.5 V to 5.5 V, T
A
= 40°C to +125°C, unless otherwise specified.)
Symbol
Parameter Test Conditions Min Max Units
I
CC
Supply Current Read, Write, V
CC
= 5.0 V,
SO open
10 MHz / 40°C to 85°C 2 mA
5 MHz / 40°C to 125°C 2 mA
I
SB1
Standby Current V
IN
= GND or V
CC
, CS = V
CC
,
WP
= V
CC
, V
CC
= 5.0 V
2
mA
I
SB2
Standby Current V
IN
= GND or V
CC
, CS = V
CC
,
WP
= GND, V
CC
= 5.0 V
T
A
= 40°C to +85°C 4
mA
T
A
= 40°C to +125°C 5
mA
I
L
Input Leakage Current V
IN
= GND or V
CC
2 2
mA
I
LO
Output Leakage
Current
CS = V
CC
,
V
OUT
= GND or V
CC
T
A
= 40°C to +85°C 1 1
mA
T
A
= 40°C to +125°C 1 2
mA
V
IL
Input Low Voltage 0.5 0.3 V
CC
V
V
IH
Input High Voltage 0.7 V
CC
V
CC
+ 0.5 V
V
OL1
Output Low Voltage V
CC
> 2.5 V, I
OL
= 3.0 mA 0.4 V
V
OH1
Output High Voltage V
CC
> 2.5 V, I
OH
= 1.6 mA V
CC
0.8 V V
V
OL2
Output Low Voltage
V
CC
> 1.8 V, I
OL
= 150 mA
0.2 V
V
OH2
Output High Voltage
V
CC
> 1.8 V, I
OH
= 100 mA
V
CC
0.2 V V
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
Table 4. PIN CAPACITANCE (Note 2) (T
A
= 25°C, f = 1.0 MHz, V
CC
= +5.0 V)
Symbol Test Conditions Min Typ Max Units
C
OUT
Output Capacitance (SO) V
OUT
= 0 V 8 pF
C
IN
Input Capacitance (CS, SCK, SI, WP, HOLD) V
IN
= 0 V 8 pF
1. The DC input voltage on any pin should not be lower than 0.5 V or higher than V
CC
+ 0.5 V. During transitions, the voltage on any pin may
undershoot to no less than 1.5 V or overshoot to no more than V
CC
+ 1.5 V, for periods of less than 20 ns.
2. These parameters are tested initially and after a design or process change that affects the parameter according to appropriate AECQ100
and JEDEC test methods.
3. Page Mode, V
CC
= 5 V, 25°C.
CAT25010, CAT25020, CAT25040
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3
Table 5. A.C. CHARACTERISTICS Mature Product
(T
A
= 40°C to +85°C (Industrial) and T
A
= 40°C to +125°C (Extended).) (Notes 4, 8)
Symbol Parameter
V
CC
= 1.8 V 5.5 V / 405C to +855C
V
CC
= 2.5 V 5.5 V / 405C to +1255C
V
CC
= 2.5 V 5.5 V
405C to +855C
Units
Min Max Min Max
f
SCK
Clock Frequency DC 5 DC 10 MHz
t
SU
Data Setup Time 40 20 ns
t
H
Data Hold Time 40 20 ns
t
WH
SCK High Time 75 40 ns
t
WL
SCK Low Time 75 40 ns
t
LZ
HOLD to Output Low Z 50 25 ns
t
RI
(Note 5) Input Rise Time 2 2
ms
t
FI
(Note 5) Input Fall Time 2 2
ms
t
HD
HOLD Setup Time 0 0 ns
t
CD
HOLD Hold Time 10 10 ns
t
V
Output Valid from Clock Low 75 40 ns
t
HO
Output Hold Time 0 0 ns
t
DIS
Output Disable Time 50 20 ns
t
HZ
HOLD to Output High Z 100 25 ns
t
CS
CS High Time 140 70 ns
t
CSS
CS Setup Time 30 15 ns
t
CSH
CS Hold Time 30 15 ns
t
CNS
CS Inactive Setup Time 20 15 ns
t
CNH
CS Inactive Hold Time 20 15 ns
t
WPS
WP Setup Time 10 10 ns
t
WPH
WP Hold Time 10 10 ns
t
WC
(Note 7) Write Cycle Time 5 5 ms
Table 6. POWERUP TIMING (Notes 5, 6)
Symbol Parameter Max Units
t
PUR
Powerup to Read Operation 1 ms
t
PUW
Powerup to Write Operation 1 ms
4. AC Test Conditions:
Input Pulse Voltages: 0.3 V
CC
to 0.7 V
CC
Input rise and fall times: 10 ns
Input and output reference voltages: 0.5 V
CC
Output load: current source I
OL
max
/I
OH
max
; C
L
= 50 pF
5. This parameter is tested initially and after a design or process change that affects the parameter.
6. t
PUR
and t
PUW
are the delays required from the time V
CC
is stable until the specified operation can be initiated.
7. t
WC
is the time from the rising edge of CS after a valid write sequence to the end of the internal write cycle.
8. All Chip Select (CS) timing parameters are defined relative to the positive clock edge (Figure 2). t
CSH
timing specification is valid
for die revision D and higher. The die revision D is identified by letter “D” or a dedicated marking code on top of the package. For
previous product revision (Rev. C) the t
CSH
is defined relative to the negative clock edge (please refer to data sheet Doc. No.
MD1006 Rev. U)

CAT25020YI-G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
EEPROM (256x8) 2K 2.5-5.5
Lifecycle:
New from this manufacturer.
Delivery:
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