NB100LVEP222
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4
CLK0
CLK0
CLK1
CLK1
CLK_SEL
Qa0:1
MR
2
÷2
÷1
Qa0:1
Qb0:2
3
Qb0:2
V
BB
fselb
Qc0:3
4
Qc0:3
fselc
Qd0:5
6
Qd0:5
fseld
Figure 3. Logic Diagram
fsela
V
CC
/V
CC0
V
EE
Figure 4. Master Reset (MR) Timing Diagram
CLK
MR
Q (B2)
Q (B1)
NB100LVEP222
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Table 3. ATTRIBUTES
Characteristics Value
Internal Input Pulldown Resistor
75 kW
Internal Input Pullup Resistor
37.5 kW
ESD Protection Human Body Model
Machine Model
Charged Device Model
> 2 kV
> 200 V
> 2 kV
Moisture Sensitivity, Indefinite Time Out of Drypack (Note 1) Pb Pkg Pb−Free Pkg
LQFP−52
QFN−52
Level 2
Level 3
Level 2
Flammability Rating Oxygen Index: 28 to 34 UL 94 V−O @ 0.125 in
Transistor Count 821 Devices
Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test
1. For additional information, refer to Application Note AND8003/D.
Table 4. MAXIMUM RATINGS
Symbol Parameter Condition 1 Condition 2 Rating Unit
V
CC
/V
CC0
PECL Mode Power Supply V
EE
= 0 V 6 V
V
EE
NECL Mode Power Supply V
CC
/V
CC0
= 0 V −6 V
V
I
PECL Mode Input Voltage
NECL Mode Input Voltage
V
EE
= 0 V
V
CC
/V
CC0
= 0 V
V
I
V
CC
/V
CC0
V
I
V
EE
6 to 0
−6 to 0
V
V
I
out
Output Current Continuous
Surge
50
100
mA
mA
I
BB
V
BB
Sink/Source ±0.5 mA
T
A
Operating Temperature Range −40 to +85 °C
T
stg
Storage Temperature Range −65 to +150 °C
q
JA
Thermal Resistance (Junction−to−Ambient)
(See Application Information)
0 lfpm
500 lfpm
LQFP−52
LQFP−52
35.6
30
°C/W
°C/W
q
JC
Thermal Resistance (Junction−to−Case)
(See Application Information)
0 lfpm
500 lfpm
LQFP−52
LQFP−52
3.2
6.4
°C/W
°C/W
q
JA
Thermal Resistance (Junction−to−Ambient)
(Note )
0 lfpm
500 lfpm
QFN−52
QFN−52
25
19.6
°C/W
°C/W
q
JC
Thermal Resistance (Junction−to−Case)
(Note )
2S2P QFN−52 21 °C/W
T
sol
Wave Solder < 2 to 3 sec @ 248°C 265 °C
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
NB100LVEP222
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Table 5. LVPECL DC CHARACTERISTICS V
CC
= V
CC0
= 2.5 V; V
EE
= 0 V (Note 2)
Symbol
Characteristic
−40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
I
EE
Power Supply Current 100 125 150 104 130 156 112 140 168 mA
V
OH
Output HIGH Voltage (Note 3) 1355 1480 1605 1355 1480 1605 1355 1480 1605 mV
V
OL
Output LOW Voltage (Note 3) 555 680 900 555 680 900 555 680 900 mV
V
IH
Input HIGH Voltage (Single−Ended)
(Note 4)
1335 1620 1335 1620 1275 1620 mV
V
IL
Input LOW Voltage (Single−Ended)
(Note 4)
555 900 555 900 555 900 mV
V
IHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 5) (Figure 6)
1.2 2.5 1.2 2.5 1.2 2.5 V
I
IH
Input HIGH Current 150 150 150
mA
I
IL
Input LOW Current CLK
CLK
0.5
−150
0.5
−150
0.5
−150
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
2. Input and output parameters vary 1:1 with V
CC
/V
CC0
. V
EE
can vary + 0.125 V to −1.3 V.
3. All loading with 50 W to V
CC
/V
CC0
− 2.0 V.
4. Do not use V
BB
Pin #10 at V
CC
/V
CC0
< 3.0 V (see AND8066).
5. V
IHCMR
min varies 1:1 with V
EE
, V
IHCMR
max varies 1:1 with V
CC
/V
CC0
. The V
IHCMR
range is referenced to the most positive side of the
differential input signal.
Table 6. LVPECL DC CHARACTERISTICS V
CC
= V
CC0
= 3.3 V; V
EE
= 0.0 V (Note 6)
Symbol
Characteristic
−40°C 25°C 85°C
Unit
Min Typ Max Min Typ Max Min Typ Max
I
EE
Power Supply Current 100 125 150 104 130 156 112 140 168 mA
V
OH
Output HIGH Voltage (Note 7) 2155 2280 2405 2155 2280 2405 2155 2280 2405 mV
V
OL
Output LOW Voltage (Note 7) 1355 1480 1700 1355 1480 1700 1355 1480 1700 mV
V
IH
Input HIGH Voltage (Single−Ended) 2135 2420 2135 2420 2135 2420 mV
V
IL
Input LOW Voltage (Single−Ended) 1355 1700 1355 1700 1355 1700 mV
V
BB
Output Reference Voltage (Note 8) 1775 1875 1975 1775 1875 1975 1775 1875 1975 mV
V
IHCMR
Input HIGH Voltage Common Mode
Range (Differential Configuration)
(Note 9) (Figure 6)
1.2 3.3 1.2 3.3 1.2 3.3 V
I
IH
Input HIGH Current 150 150 150
mA
I
IL
Input LOW Current CLK
CLK
0.5
−150
0.5
−150
0.5
−150
mA
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm.
6. Input and output parameters vary 1:1 with V
CC
/V
CC0
. V
EE
can vary + 0.925 V to −0.5 V.
7. All loading with 50 W to V
CC
/V
CC0
−2.0 V.
8. Single−Ended input operation is limited V
CC
/V
CC0
3.0 V in LVPECL mode.
9. V
IHCMR
min varies 1:1 with V
EE
, V
IHCMR
max varies 1:1 with V
CC
/V
CC0
. The V
IHCMR
range is referenced to the most positive side of the
differential input signal.

NB100LVEP222FAG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Clock Drivers & Distribution 2.5/3.3V 1:15 Diff ECL/PECL Clk Driver
Lifecycle:
New from this manufacturer.
Delivery:
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