IDT8T49N008ANLGI REVISION A FEBRUARY 13, 2014 31 ©2014 Integrated Device Technology, Inc.
IDT8T49N008I Data Sheet PROGRAMMABLE FEMTOCLOCK
®
NG LVPECL/LVDS CLOCK GENERATOR WITH 8-OUTPUTS
3. Calculations and Equations.
The purpose of this section is to calculate the power dissipation for the LVPECL output pair.
LVPECL output driver circuit and termination are shown in Figure 10.
Figure 10. LVPECL Driver Circuit and Termination
To calculate worst case power dissipation into the load, use the following equations which assume a 50 load, and a termination voltage of
V
CC O
– 2V.
For logic high, V
OUT
= V
OH_MAX
= V
CCO_MAX
– 0.75V
(V
CCO_MAX
– V
OH_MAX
) = 0.75V
For logic low, V
OUT
= V
OL_MAX
= V
CCO_MAX
– 1.6V
(V
CCO_MAX
– V
OL_MAX
) = 1.6V
Pd_H is power dissipation when the output drives high.
Pd_L is the power dissipation when the output drives low.
Pd_H = [(V
OH_MAX
– (V
CCO_MAX
– 2V))/R
L
] * (V
CCO_MAX
– V
OH_MAX
) = [(2V – (V
CCO_MAX
– V
OH_MAX
))/R
L
] * (V
CCO_MAX
– V
OH_MAX
) =
[(2V – 0.75V)/50] * 0.75V = 18.75mW
Pd_L = [(V
OL_MAX
– (V
CCO_MAX
– 2V))/R
L
] * (V
CCO_MAX
– V
OL_MAX
) = [(2V – (V
CCO_MAX
– V
OL_MAX
))/R
L
] * (V
CCO_MAX
– V
OL_MAX
) =
[(2V – 1.6V)/50] * 1.6V = 12.80mW
Total Power Dissipation per output pair = Pd_H + Pd_L = 31.55mW
V
OUT
V
CCO
V
CCO
- 2V
Q1
RL
50Ω
IDT8T49N008ANLGI REVISION A FEBRUARY 13, 2014 32 ©2014 Integrated Device Technology, Inc.
IDT8T49N008I Data Sheet PROGRAMMABLE FEMTOCLOCK
®
NG LVPECL/LVDS CLOCK GENERATOR WITH 8-OUTPUTS
LVDS Power Considerations
This section provides information on power dissipation and junction temperature for the IDT8T49N008I.
Equations and example calculations are also provided.
1. Power Dissipation.
The total power dissipation for the IDT8T49N008I is the sum of the core power plus the analog power plus the power dissipated in the load(s).
The following is the power dissipation for V
CC
= 3.3V +5% = 3.465V, which gives worst case results.
Power (core)
MAX
= V
CC_MAX
* (I
CC_MAX
+ I
CCA_MAX
) = 3.465V * (125mA + 32mA) = 544.005mW
Power (outputs)
MAX
= V
CCO_MAX
* I
CCO_MAX
= 3.465V * 162mA = 561.33mW
Total Power_
MAX
= 544.005mW + 561.33mW = 1105.335mW
2. Junction Temperature.
Junction temperature, Tj, is the temperature at the junction of the bond wire and bond pad directly affects the reliability of the device. The
maximum recommended junction temperature is 125°C. Limiting the internal transistor junction temperature, Tj, to 125°C ensures that the bond
wire and bond pad temperature remains below 125°C.
The equation for Tj is as follows: Tj =
JA
* Pd_total + T
A
Tj = Junction Temperature
JA
= Junction-to-Ambient Thermal Resistance
Pd_total = Total Device Power Dissipation (example calculation is in section 1 above)
T
A
= Ambient Temperature
In order to calculate junction temperature, the appropriate junction-to-ambient thermal resistance
JA
must be used. Assuming no air flow and
a multi-layer board, the appropriate value is 32.4°C/W per Table 8 below.
Therefore, Tj for an ambient temperature of 85°C with all outputs switching is:
85°C + 1.105W * 32.4°C/W = 120.8°C. This is below the limit of 125°C.
This calculation is only an example. Tj will obviously vary depending on the number of loaded outputs, supply voltage, air flow and the type of
board (multi-layer).
Table 8. Thermal Resistance
JA
for 40-Lead VFQFN, Forced Convection
JA
by Velocity
Meters per Second 012.5
Multi-Layer PCB, JEDEC Standard Test Boards 32.4°C/W 25.7°C/W 23.4°C/W
IDT8T49N008ANLGI REVISION A FEBRUARY 13, 2014 33 ©2014 Integrated Device Technology, Inc.
IDT8T49N008I Data Sheet PROGRAMMABLE FEMTOCLOCK
®
NG LVPECL/LVDS CLOCK GENERATOR WITH 8-OUTPUTS
Reliability Information
Table 9.
JA
vs. Air Flow Table for a 40-Lead VFQFN
Transistor Count
The transistor count for IDT8T49N008I is: 26,856
JA
vs. Air Flow
Meters per Second 012.5
Multi-Layer PCB, JEDEC Standard Test Boards 32.4°C/W 25.7°C/W 23.4°C/W

8T49N008A-024NLGI

Mfr. #:
Manufacturer:
IDT
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Clock Generators & Support Products FEMTOCLOCK NG
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