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X9317WM8IZ-2.7

P1-P3P4-P6P7-P9P10-P12P13-P13
1
DATASHEET
Low Noise, Low Power, 100 Taps, Digitally Controlled
Potentiometer (XDCP™)
X9317
The Intersil X9317 is a digitally controlled potentiometer
(XDCP™). The device consists of a resistor array, wiper
switches, a control section, and nonvolatile memory. The wiper
position is controlled by a 3-wire interface.
The potentiometer is implemented by a resistor array
composed of 99 resistive elements and a wiper switching
network. Between each element and at either end are tap
points accessible to the wiper terminal. The position of the
wiper element is controlled by the CS
, U/D, and INC inputs. The
position of the wiper can be stored in nonvolatile memory and
then be recalled upon a subsequent power-up operation.
The device can be used as a three-terminal potentiometer for
voltage control or as a two-terminal variable resistor for current
control in a wide variety of applications.
Applications
•LCD bias control
• DC bias adjustment
• Gain and offset trim
• Laser diode bias control
• Voltage regulator output control
Features
• Solid-state potentiometer
• 3-wire serial up/down interface
• 100 wiper tap points
- Wiper position stored in nonvolatile memory and recalled
on power-up
• 99 resistive elements
- Temperature compensated
- End-to-end resistance range ±20%
•Low power CMOS
-V
CC
= 2.7V to 5.5V, and 5V ±10%
- Standby current <5µA
• High reliability
- Endurance, 100,000 data changes per bit
- Register data retention, 100 years
•R
TOTAL
values = 10kΩ, 50kΩ, 100kΩ
•Packages
- 8 Ld SOIC, TSSOP, and MSOP
• Pb-free (RoHS compliant)
UP/DOWN
COUNTER
7-BIT
NONVOLATILE
MEMORY
STORE AND
RECALL
CONTROL
CIRCUITRY
ONE
OF
ONE
DECODER
RESISTOR
ARRAY
R
H
U/D
INC
CS
WIPER
SWITCHES
HUNDRED
V
CC
V
SS
R
L
R
W
CONTROL
AND
MEMORY
UP/DOWN
(U/D
)
INCREMENT
(INC
)
DEVICE SELECT
(CS
)
V
CC
(SUPPLY VOLTAGE)
V
SS
(GROUND)
R
H
R
W
R
L
GENERAL
DETAILED
0
1
2
96
97
98
99
FIGURE 1. BLOCK DIAGRAM
November 4, 2014
FN8183.9
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Copyright Intersil Americas LLC 2004, 2005, 2008, 2009, 2012, 2014. All Rights Reserved
Intersil (and design) and XDCP are trademarks owned by Intersil Corporation or one of its subsidiaries.
All other trademarks mentioned are the property of their respective owners.
X9317
2
FN8183.9
November 4, 2014
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Ordering Information
PART NUMBER
(Notes 1
, 2, 3)PART MARKING
V
CC
LIMITS
(V)
R
TOTAL
(kΩ)
TEMPERATURE
RANGE (°C)
PACKAGE
(Pb-Free)
PKG.
DWG. #
X9317WM8Z DCW 5 ±10% 10 0 to +70 8 Ld MSOP M8.118
X9317WM8IZ DCT -40 to +85 8 Ld MSOP M8.118
X9317WS8Z X9317W Z 0 to +70 8 Ld SOIC M8.15E
X9317WS8IZ X9317W ZI -40 to +85 8 Ld SOIC M8.15E
X9317WV8Z 9317W Z 0 to +70 8 Ld TSSOP M8.173
X9317WV8IZ 9317W IZ -40 to +85 8 Ld TSSOP M8.173
X9317UM8Z DCS 50 0 to +70 8 Ld MSOP M8.118
X9317UM8IZ DCR -40 to +85 8 Ld MSOP M8.118
X9317US8Z X9317U Z 0 to +70 8 Ld SOIC M8.15E
X9317US8IZ X9317U ZI -40 to +85 8 Ld SOIC M8.15E
X9317UV8Z 9317U Z 0 to +70 8 Ld TSSOP M8.173
X9317UV8IZ 9317U IZ -40 to +85 8 Ld TSSOP M8.173
X9317TM8Z DCN 100 0 to +70 8 Ld MSOP M8.118
X9317TM8IZ DCL -40 to +85 8 Ld MSOP M8.118
X9317TS8Z X9317T Z 0 to +70 8 Ld SOIC M8.15E
X9317TS8IZ X9317T ZI -40 to +85 8 Ld SOIC M8.15E
X9317TV8Z 9317T Z 0 to +70 8 Ld TSSOP M8.173
X9317TV8IZ 9317T IZ -40 to +85 8 Ld TSSOP M8.173
X9317WM8Z-2.7 DCX 2.7 to 5.5 10 0 to +70 8 Ld MSOP M8.118
X9317WM8IZ-2.7 DCU -40 to +85 8 Ld MSOP M8.118
X9317WS8Z-2.7 X9317W ZF 0 to +70 8 Ld SOIC M8.15E
X9317WS8IZ-2.7
X9317W ZG -40 to +85 8 Ld SOIC M8.15E
X9317WV8Z-2.7
9317W FZ 0 to +70 8 Ld TSSOP M8.173
X9317WV8IZ-2.7 AKZ -40 to +85 8 Ld TSSOP M8.173
X9317UM8Z-2.7 AOB 50 0 to +70 8 Ld MSOP M8.118
X9317UM8IZ-2.7 AOH -40 to +85 8 Ld MSOP M8.118
X9317US8Z-2.7 X9317U ZF 0 to +70 8 Ld SOIC M8.15E
X9317US8IZ-2.7 X9317U ZG -40 to +85 8 Ld SOIC M8.15E
X9317UV8Z-2.7 9317U FZ 0 to +70 8 Ld TSSOP M8.173
X9317UV8IZ-2.7 9317U GZ -40 to +85 8 Ld TSSOP M8.173
X9317TM8Z-2.7 DCP 100 0 to +70 8 Ld MSOP M8.118
X9317TM8IZ-2.7 DCM -40 to +85 8 Ld MSOP M8.118
X9317TS8Z-2.7 X9317T ZF 0 to +70 8 Ld SOIC M8.15E
X9317TS8IZ-2.7 X9317T ZG -40 to +85 8 Ld SOIC M8.15E
X9317TV8Z-2.7 9317T FZ 0 to +70 8 Ld TSSOP M8.173
X9317TV8IZ-2.7 9317T GZ -40 to +85 8 Ld TSSOP M8.173
NOTES:
1. Add “T1” suffix for tape and reel. Please refer to TB347
for details on reel specifications.
2. These Intersil Pb-free plastic packaged products employ special Pb-free material sets, molding compounds/die attach materials, and 100% matte
tin plate plus anneal (e3 termination finish, which is RoHS compliant and compatible with both SnPb and Pb-free soldering operations). Intersil Pb-
free products are MSL classified at Pb-free peak reflow temperatures that meet or exceed the Pb-free requirements of IPC/JEDEC JSTD-020.
3. For Moisture Sensitivity Level (MSL), please see device information page for X9317
. For more information on MSL please see tech brief TB363.
X9317
3
FN8183.9
November 4, 2014
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Pin Configurations
X9317
(8 LD TSSOP)
TOP VIEW
X9317
(8 LD SOIC, 8 LD MSOP)
TOP VIEW
INC
R
L
CS
V
CC
1
2
3
4
8
7
6
5
U/D
R
W
V
SS
R
H
R
H
V
CC
INC
U/D
1
2
3
4
8
7
6
5
V
SS
CS
R
L
R
W
Pin Descriptions
SOIC/MSOP TSSOP SYMBOL BRIEF DESCRIPTION
13INC
Increment Toggling INC while CS
is low moves the wiper either up
or down.
24U/D
Up/Down The U/D input controls
the direction of the wiper
movement.
35R
H
The high terminal is equivalent to
one of the fixed terminals of a
mechanical potentiometer.
46V
SS
Ground
57R
W
The wiper terminal is equivalent
to the movable terminal of a
mechanical potentiometer.
68
R
L
The low terminal is equivalent to
one of the fixed terminals of a
mechanical potentiometer.
71CS
Chip Select The device is
selected when the CS
input is
LOW, and de-selected when CS
is
high.
82V
CC
Supply Voltage
P1-P3P4-P6P7-P9P10-P12P13-P13

X9317WM8IZ-2.7

Mfr. #:
Buy X9317WM8IZ-2.7
Manufacturer:
Renesas / Intersil
Description:
Digital Potentiometer ICs SINGLE XDCP 10KOHM 100 TAP U/D
Lifecycle:
New from this manufacturer.
Delivery:
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