LTC4229
4
4229f
For more information www.linear.com/LTC4229
elecTrical characTerisTics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at T
A
= 25°C. V
IN
= 12V, unless otherwise noted.
SYMBOL PARAMETER CONDITIONS MIN TYP MAX UNITS
t
D(HGATE)
UV High, EN Low to HGATE Turn-On Delay DTMR = INTV
CC
l
50 100 150 ms
t
P(HGATE)
UV to HGATE Propagation Delay UV = Step 0.8V to 2V
l
10 20 µs
Input/Output Pin
V
DOFF(H,TH)
DOFF Pin High Threshold DOFF Rising
l
1.21 1.235 1.26 V
V
DOFF(L,TH)
DOFF Pin Low Threshold DOFF Falling
l
1.19 1.215 1.24 V
∆V
DOFF(HYST)
DOFF Pin Hysteresis
l
10 20 30 mV
V
IN(TH)
UV, OV, FB Pin Threshold Voltage Voltage Rising
l
1.21 1.235 1.26 V
∆V
UV(HYST)
UV Pin Hysteresis
l
40 80 120 mV
∆V
OV(HYST)
OV Pin Hysteresis
l
10 20 30 mV
∆V
FB(HYST)
FB Pin Hysteresis
l
10 20 30 mV
V
UV(RESET)
UV Pin Fault Reset Threshold Voltage UV Falling
l
0.57 0.6 0.63 V
I
IN(LEAK)
Input Leakage Current (UV, OV, FB, DOFF) V = 5V
l
0 ±1 µA
V
EN(TH)
EN Pin Threshold Voltage EN Rising
l
1.185 1.235 1.284 V
∆V
EN(HYST)
EN Pin Hysteresis
l
60 110 160 mV
I
EN(UP)
EN Pull-Up Current EN = 1V
l
–7 –10 –13 µA
V
TMR(H)
FTMR, DTMR, RTMR Pin High Threshold
l
1.198 1.235 1.272 V
V
TMR(L)
FTMR, DTMR, RTMR Pin Low Threshold
l
0.15 0.2 0.25 V
I
FTMR(UP)
FTMR Pull-Up Current FTMR = 1V, In Fault Mode
l
–80 –100 –120 µA
I
FTMR(DN)
FTMR Pull-Down Current FTMR = 2V, No Faults
l
1.3 2 2.6 µA
I
FTMR(RATIO)
FTMR Current Ratio I
FTMR(DN)
/I
FTMR(UP)
l
1.3 2 2.7 %
I
TMR(UP)
DTMR, RTMR Pull-Up Current V = 0V
l
–8 –10 –12 µA
I
TMR(DN)
DTMR, RTMR Pull-Down Current V = 1.5V
l
1 5 10 mA
V
IH
Input High Voltage (DTMR, RTMR)
l
INTV
CC
–
0.1
INTV
CC
+
0.1
V
V
DCFG(TH)
Logic Input Threshold (DCFG)
l
0.5 2 V
I
OUT
OUT Pin Current OUT = 11V, IN = 12V, SENSE
+
= 11.5V
OUT = 13V, IN = 12V, SENSE
+
= 11.5V
l
l
40
1.7
100
4
µA
mA
V
OL
Output Low Voltage
(PWRGD, FAULT, DSTAT, DFL
T)
I = 1mA
I = 3mA
l
l
0.15
0.4
0.4
1.2
V
V
V
OH
Output High Voltage
(PWRGD, FAULT, DFLT)
I = –1µA
l
INTV
CC
–
1
INTV
CC
–
0.5
V
I
OH
Input Leakage Current
(PWRGD, FAULT, DSTAT, DFL
T)
V = 18V
l
0 ±1 µA
I
PU
Output Pull-Up Current
(PWRGD, FAULT, DFLT)
V = 1.5V
l
–7 –10 –13 µA
t
RST(UV)
UV Low to FAULT High
l
20 40 µs
t
PG(FB)
FB Low to PWRGD High
l
20 40 µs
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: All currents into device pins are positive; all currents
out of device
pins are negative. All voltages are referenced to GND unless other
wise
specified.
Note 3: An internal clamp limits the DGATE and CPO pins to a minimum of
10V above and a diode below DSRC. Driving these pins to voltages beyond
the clamp may damage the device.
Note 4: An internal clamp limits the HGATE pin to a minimum of 10V
above and a diode below OUT. Driving this pin to voltages beyond the
clamp may damage the device.
Note 5: Thermal resistance is specified when the exposed pad is soldered
to a 3" × 4.5", four layer, FR4 board.