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74HC4040N,652

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20
74HC_HCT4040 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 20 March 2014 7 of 20
NXP Semiconductors
74HC4040; 74HCT4040
12-stage binary ripple counter
C
I
input
capacitance
-3.5- pF
74HCT4040
V
IH
HIGH-level
input voltage
V
CC
= 4.5 V to 5.5 V 2.0 1.6 - 2.0 - 2.0 - V
V
IL
LOW-level
input voltage
V
CC
= 4.5 V to 5.5 V - 1.2 0.8 - 0.8 - 0.8 V
V
OH
HIGH-level
output voltage
V
I
=V
IH
or V
IL
; V
CC
=4.5V
I
O
= 20 A 4.4 4.5 - 4.4 - 4.4 - V
I
O
= 4 mA 3.98 4.32 - 3.84 - 3.7 - V
V
OL
LOW-level
output voltage
V
I
=V
IH
or V
IL
; V
CC
=4.5V
I
O
=20A - 0 0.1 - 0.1 - 0.1 V
I
O
= 4.0 mA - 0.15 0.26 - 0.33 - 0.4 V
I
I
input leakage
current
V
I
=V
CC
or GND;
V
CC
=5.5V
--0.1 - 1.0 - 1.0 A
I
CC
supply current V
I
=V
CC
or GND; I
O
=0A;
V
CC
=5.5V
- - 8.0 - 80 - 160 A
I
CC
additional
supply current
per input pin;
V
I
=V
CC
2.1 V; I
O
=0A;
other inputs at V
CC
or GND;
V
CC
= 4.5 V to 5.5 V
pin CP
- 85 306 - 383 - 417 A
pin MR - 110 396 - 495 - 539 A
C
I
input
capacitance
-3.5- - - - -pF
Table 6. Static characteristics
…continued
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
74HC_HCT4040 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 20 March 2014 8 of 20
NXP Semiconductors
74HC4040; 74HCT4040
12-stage binary ripple counter
11. Dynamic characteristics
Table 7. Dynamic characteristics
GND (ground = 0 V); C
L
= 50 pF unless otherwise specified; for test circuit, see Figure 9.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
74HC4040
t
pd
propagation
delay
CP to Q0; see Figure 8
[1]
V
CC
= 2.0 V - 47 150 - 190 - 225 ns
V
CC
= 4.5 V - 17 30 - 38 - 45 ns
V
CC
=5.0V; C
L
=15pF - 14 - - - - - ns
V
CC
= 6.0 V - 14 26 - 33 - 38 ns
Qn to Qn+1; see Figure 8
V
CC
= 2.0 V - 28 100 - 125 - 150 ns
V
CC
= 4.5 V - 10 20 - 25 - 30 ns
V
CC
=5.0V; C
L
=15pF - 8 - - - - - ns
V
CC
= 6.0 V - 8 17 - 21 - 26 ns
t
PHL
HIGH to LOW
propagation
delay
MR to Qn; see Figure 8
V
CC
= 2.0 V - 61 185 - 230 - 280 ns
V
CC
= 4.5 V - 22 37 - 46 - 56 ns
V
CC
= 6.0 V - 18 31 - 39 - 48 ns
t
t
transition time Qn; see Figure 8
[2]
V
CC
= 2.0 V - 19 75 - 95 - 110 ns
V
CC
= 4.5 V - 7 15 - 19 - 22 ns
V
CC
= 6.0 V - 6 13 - 16 - 19 ns
t
W
pulse width CP input, HIGH or LOW;
see Figure 8
V
CC
= 2.0 V 80 14 - 100 - 120 - ns
V
CC
= 4.5 V 16 5 - 20 - 24 - ns
V
CC
= 6.0 V 14 4 - 17 - 20 - ns
MR input, HIGH;
see Figure 8
V
CC
= 2.0 V 80 22 - 100 - 120 - ns
V
CC
= 4.5 V 16 8 - 20 - 24 - ns
V
CC
= 6.0 V 14 6 - 17 - 20 - ns
t
rec
recovery time MR to CP; see Figure 8
V
CC
= 2.0 V 50 8 - 65 - 75 - ns
V
CC
= 4.5 V 10 3 - 13 - 15 - ns
V
CC
= 6.0 V 9 2 - 11 - 13 - ns
f
max
maximum
frequency
CP input; see Figure 8
V
CC
= 2.0 V 6 27 - 4.8 - 4 - MHz
V
CC
= 4.5 V 30 82 - 24 - 20 - MHz
V
CC
=5.0V; C
L
=15pF - 90 - - - - - MHz
V
CC
= 6.0 V 35 98 - 28 - 24 - MHz
74HC_HCT4040 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2014. All rights reserved.
Product data sheet Rev. 4 — 20 March 2014 9 of 20
NXP Semiconductors
74HC4040; 74HCT4040
12-stage binary ripple counter
[1] t
pd
is the same as t
PHL
, t
PLH
.
[2] t
t
is the same as t
THL
, t
TLH
.
[3] C
PD
is used to determine the dynamic power dissipation (P
D
in W).
P
D
=C
PD
V
CC
2
f
i
N+(C
L
V
CC
2
f
o
) where:
f
i
= input frequency in MHz;
f
o
= output frequency in MHz;
C
L
= output load capacitance in pF;
V
CC
= supply voltage in V;
N = number of inputs switching;
(C
L
V
CC
2
f
o
) = sum of outputs.
C
PD
power
dissipation
capacitance
V
I
=GNDtoV
CC
[3]
-20- - - - - pF
74HCT4040
t
pd
propagation
delay
CP to Q0; see Figure 8
[1]
V
CC
= 4.5 V - 19 40 - 50 - 60 ns
V
CC
=5.0V; C
L
=15pF - 16 - - - - - ns
Qn to Qn+1; see Figure 8
V
CC
= 4.5 V - 10 20 - 25 - 30 ns
V
CC
=5.0V; C
L
=15pF - 8 - - - - - ns
t
PHL
HIGH to LOW
propagation
delay
MR to Qn; see Figure 8
V
CC
= 4.5 V - 23 45 - 56 - 68 ns
t
t
transition time Qn; see Figure 8
[2]
V
CC
= 4.5 V - 7 15 - 19 - 22 ns
t
W
pulse width CP input, HIGH or LOW;
see Figure 8
V
CC
= 4.5 V 16 7 - 20 - 24 - ns
MR input, HIGH;
see Figure 8
V
CC
= 4.5 V 16 6 - 20 - 24 - ns
t
rec
recovery time MR to CP; see Figure 8
V
CC
= 4.5 V 10 2 - 13 - 15 - ns
f
max
maximum
frequency
CP input; see Figure 8
V
CC
= 4.5 V 30 72 - 24 - 20 - MHz
V
CC
=5.0V; C
L
=15pF - 79 - - - - - MHz
C
PD
power
dissipation
capacitance
V
I
=GNDtoV
CC
[3]
-20- - - - - pF
Table 7. Dynamic characteristics
…continued
GND (ground = 0 V); C
L
= 50 pF unless otherwise specified; for test circuit, see Figure 9.
Symbol Parameter Conditions 25 C 40 C to +85 C 40 C to +125 C Unit
Min Typ Max Min Max Min Max
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P20

74HC4040N,652

Mfr. #:
Buy 74HC4040N,652
Manufacturer:
NXP Semiconductors
Description:
Counter ICs 12ST BIN RIP COUNTER
Lifecycle:
New from this manufacturer.
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