© Semiconductor Components Industries, LLC, 2010
September, 2010 Rev. 1
1 Publication Order Number:
NCP3012/D
NCP3012
Synchronous PWM Controller
The NCP3012 is a PWM device designed to operate from a wide
input range and is capable of producing an output voltage as low as
0.8 V. The NCP3012 provides integrated gate drivers and an internally
set 75 kHz oscillator. The NCP3012 has an externally compensated
transconductance error amplifier with an internally fixed softstart.
The NCP3012 incorporates output voltage monitoring with a Power
Good pin to indicate that the system is in regulation. The dual function
SYNC pin synchronizes the device to a higher frequency (Slave
Mode) or outputs a 180° outofphase clock signal to drive another
NCP3012 (Master Mode). Protection features include lossless current
limit and short circuit protection, output overvoltage and undervoltage
protection, and input undervoltage lockout. The NCP3012 is available
in a 14pin TSSOP package.
Features
Input Voltage Range from 4.7 V to 28 V
75 kHz Operation
0.8 V $1.0% Reference Voltage
Buffered External +1.25 V Reference
Current Limit and Short Circuit Protection
Power Good
Enable/Disable Pin
Input Undervoltage Lockout
External Synchronization
Output Overvoltage and Undervoltage Protection
This is a PbFree Device
Typical Applications
Set Top Box
Power Modules
ASIC / DSP Power Supply
VIN
VCC
BST
HSDR
VSW
LSDR
GND
FB
COMP
EN
PG
VREF
SYNC
C
BST
Q2
Q1
LO
R
ISET
RFB1
C
O
R
C
C
C2
CIN
C
C1
R
FB2
V
OUT
R
REF
CREF
Figure 1. Typical Application Circuit
TSSOP14
DT SUFFIX
CASE 948G
MARKING DIAGRAM
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3012= Device Code
A = Assembly Location
L = Wafer Lot
Y = Year
W = Work Week
G = PbFree Package
1
14
3012
ALYWG
G
1
14
VREF
EN
NC
SYNC
PG
COMP
FB
HSDR
VCC
BST
VSW
NC
LSDR
GND
PIN CONNECTIONS
(TOP VIEW)
Device Package Shipping
ORDERING INFORMATION
NCP3012DTBR2G TSSOP14
(PbFree)
2500 / Tape & Reel
For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specifications
Brochure, BRD8011/D.
(Note: Microdot may be in either location)
NCP3012
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2
GATE
DRIVE
LOGIC
VC
CLK/
DMAX/
SOFT
START
OOV
BOOST
CLAMP
LEVEL
SHIFT
SAMPLE &
HOLD
VC
HSDR
LSDR
GND
+
+
+
VCC
COMP
FB
REF
RAMP
OSCILLATOR
BST
VSW
VCC
Figure 2. NCP3012 Block Diagram
PG
EN
SYNC
VREF
INTERNAL BIAS
ISET
1.5 V
BST_CHRG
ENABLE/
POWER GOOD
LOGIC
THERMAL SD
POR/STARTUP
1.25 V
REFERENCE
OTA
PWM
COMP
OUV
CURRENT
LIMIT
NCP3012
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3
PIN FUNCTION DESCRIPTION
Pin Pin Name Description
1 VREF
The VREF pin is the output for a 1.25 V reference (1 mA max). A 100 kW resistor in parallel with a 1 mF
ceramic capacitor must be connected from this pin to GND to ensure external reference stability.
2 EN The EN pin is the enable/disable input. A logic high on this pin enables the device. This pin has also an internal
current source pull up. A 10 kW resistor should be connected in series with this pin if V
EN
is externally biased
from a separate supply.
3 NC Not Connected
4 SYNC The dual function SYNC pin synchronizes the device to a higher frequency (Slave Mode). Alternately, it outputs
an 85 kHz clock signal with 180° of phase shift (Master Mode). Connect a 60 kW resistor from SYNC to GND
to enable Master Mode. No resistor is required for Slave Mode.
5 PG The Power Good pin is an open drain output that is low when the regulated output voltage is beyond the
“Power Good” upper and lower thresholds. Otherwise, it is a high impedance pin.
6 COMP The COMP pin connects to the output of the Operational Transconductance Amplifier (OTA) and the positive
terminal of the PWM comparator. This pin is used in conjunction with the FB pin to compensate the voltage
mode control feedback loop.
7 FB The FB pin is connected to the inverting input of the OTA. This pin is used in conjunction with the COMP pin to
compensate the voltage mode control feedback loop.
8 GND Ground Pin
9 LSDR The LSDR pin is connected to the output of the low side driver which connects to the gate of the low side
NFET. It is also used to set the threshold of the current limit circuit (I
SET
) by connecting a resistor from LSDR
to GND.
10 NC Not Connected
11 VSW The VSW pin is the return path for the high side driver. It is also used in conjunction with the V
CC
pin to sense
current in the high side MOSFET.
12 HSDR The HSDR pin is connected to the output of the high side driver which connects to the gate of the high side
NFET.
13 BST The BST pin is the supply rail for the gate drivers. A capacitor must be connected between this pin and the
VSW pin.
14 V
CC
The V
CC
pin is the main voltage supply input. It is also used in conjunction with the VSW pin to sense current
in the high side MOSFET.

NCV3012DTBR2G

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Switching Controllers PWM CONTROLLER
Lifecycle:
New from this manufacturer.
Delivery:
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