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AD5378ABCZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P29
AD5378
Rev. A | Page 3 of 28
GENERAL DESCRIPTION
The AD5378 contains 32 14-bit DACs in one CSPBGA package.
The AD5378 provides a bipolar output range determined by the
voltages applied to the V
REF
(+) and V
REF
(−) inputs. The maximum
output voltage span is 17.5 V, corresponding to a bipolar output
range of −8.75 V to +8.75 V, and is achieved with reference volt-
ages of V
REF
(−) = −3.5 V and V
REF
(+) = +5 V.
The AD5378 guarantees operation over a wide V
SS
/V
DD
supply
range from ±11.4 V to ±16.5 V. The output amplifier headroom
requirement is 2.5 V operating with a load current of 1.5 mA,
and 2 V operating with a load current of 0.5 mA.
The AD5378 contains a double-buffered parallel interface in
which 14 data bits are loaded into one of the input registers
under the control of the
WR
,
CS
, and DAC channel address
pins, A0 to A7. It also has a 3-wire serial interface, which is
compatible with SPI®, QSPI™, MICROWIRE™, and DSP inter-
face standards and can handle clock speeds of up to 50 MHz.
The DAC outputs are updated when the DAC registers receive
new data. All the outputs can be updated simultaneously by
taking the
LDAC
input low. Each channel has a programmable
gain and an offset adjust register.
Each DAC output is gained and buffered on-chip with respect
to an external REFGND input. The DAC outputs can also be
switched to REFGND via the
CLR
pin. Table 1 and Table 2
show the product portfolio for high channel count bipolar and
unipolar voltage output DACs.
Table 1. 40-Channel, Bipolar, Voltage Output DAC
Model Resolution Analog Supplies
Output
Channels Linearity Error (LSB)
Package
Description Package Option
AD5379ABC 14 Bits ±11.4 V to ±16.5 V 40 ±3 108-Lead CSPBGA BC-108
Table 2. High Channel Count, Low Voltage, Single-Supply DACs
Model Resolution AV
DD
Range
Output
Channels Linearity Error (LSB)
Package
Description Package Option
AD5380BST-5 14 Bits 4.5 V to 5.5 V 40 ±4 100-Lead LQFP ST-100
AD5380BST-3 14 Bits 2.7 V to 3.6 V 40 ±4 100-Lead LQFP ST-100
AD5381BST-5 12 Bits 4.5 V to 5.5 V 40 ±1 100-Lead LQFP ST-100
AD5381BST-3 12 Bits 2.7 V to 3.6 V 40 ±1 100-Lead LQFP ST-100
AD5384BBC-5 14 Bits 4.5 V to 5.5 V 40 ±4 100-Lead CSPBGA BC-100
AD5384BBC-3 14 Bits 2.7 V to 3.6 V 40 ±4 100-Lead CSPBGA BC-100
AD5382BST-5 14 Bits 4.5 V to 5.5 V 32 ±4 100-Lead LQFP ST-100
AD5382BST-3 14 Bits 2.7 V to 3.6 V 32 ±4 100-Lead LQFP ST-100
AD5383BST-5 12 Bits 4.5 V to 5.5 V 32 ±1 100-Lead LQFP ST-100
AD5383BST-3 12 Bits 2.7 V to 3.6 V 32 ±1 100-Lead LQFP ST-100
AD5390BST-5 14 Bits 4.5 V to 5.5 V 16 ±3 52-Lead LQFP ST-52
AD5390BCP-5 14 Bits 4.5 V to 5.5 V 16 ±3 64-Lead LFCSP CP-64
AD5390BST-3 14 Bits 2.7 V to 3.6 V 16 ±4 52-Lead LQFP ST-52
AD5390BCP-3 14 Bits 2.7 V to 3.6 V 16 ±4 64-Lead LFCSP CP-64
AD5391BST-5 12 Bits 4.5 V to 5.5 V 16 ±1 52-Lead LQFP ST-52
AD5391BCP-5 12 Bits 4.5 V to 5.5 V 16 ±1 64-Lead LFCSP CP-64
AD5391BST-3 12 Bits 2.7 V to 3.6 V 16 ±1 52-Lead LQFP ST-52
AD5391BCP-3 12 Bits 2.7 V to 3.6 V 16 ±1 64-Lead LFCSP CP-64
AD5392BST-5 14 Bits 4.5 V to 5.5 V 8 ±3 52-Lead LQFP ST-52
AD5392BCP-5 14 Bits 4.5 V to 5.5 V 8 ±3 64-Lead LFCSP CP-64
AD5392BST-3 14 Bits 2.7 V to 3.6 V 8 ±4 52-Lead LQFP ST-52
AD5392BCP-3 14 Bits 2.7 V to 3.6 V 8 ±4 64-Lead LFCSP CP-64
AD5378
Rev. A | Page 4 of 28
SPECIFICATIONS
V
CC
= 2.7 V to 5.5 V; V
DD
= 11.4 V to 16.5 V; V
SS
= −11.4 V to −16.5 V; V
REF
(+) = +5 V; V
REF
(−) = −3.5 V; AGND = DGND = REFGND =
0 V; V
BIAS
= 5 V; C
L
= 200 pF to GND; R
L
= 11 kΩ to 3 V; gain = 1; offset = 0 V; all specifications T
MIN
to T
MAX
, unless otherwise noted.
Table 3.
Parameter A Version
1
Unit Test Conditions/Comments
ACCURACY
Resolution 14 Bits
Relative Accuracy ±3 LSB max −40°C to +85°C
±2.5 LSB max 0°C to 70°C
Differential Nonlinearity −1/+1.5 LSB max Guaranteed monotonic by design over temperature
Zero-Scale Error ±12 mV max −40°C to +85°C
±5 mV max 0°C to 70°C
Full-Scale Error ±12 mV max −40°C to +85°C
±8 mV max 0°C to 70°C
Gain Error ±8 mV max −40°C to +85°C
±1/±5 mV typ/max 0°C to 70°C
VOUT Temperature Coefficient 5 ppm FSR/°C typ Includes linearity, offset, and gain drift; see Figure 11
DC Crosstalk
2
0.5 mV max Typically 100 μV
REFERENCE INPUTS
2
V
REF
(+) DC Input Impedance 1 MΩ min Typically 100 MΩ
V
REF
(−) DC Input Impedance 8 kΩ min Typically 12 kΩ
V
REF
(+) Input Current ±10 μA max Per input; typically ±30 nA
V
REF
(+) Range 1.5/5 V min/max ±2% for specified operation
V
REF
(−) Range −3.5/0 V min/max ±2% for specified operation
REFGND INPUTS
2
DC Input Impedance 80 kΩ min Typically 120 kΩ
Input Range ±0.5 V min/max
OUTPUT CHARACTERISTICS
2
Output Voltage Range V
SS
+ 2/V
SS
+ 2.5 V min I
LOAD
= ±0.5 mA/±1.5 mA
V
DD
− 2/V
DD
− 2.5 V max I
LOAD
= ±0.5 mA/±1.5 mA
Short-Circuit Current 15 mA max
Load Current ±1.5 mA max
Capacitive Load 2200 pF max
DC Output Impedance 1 Ω max
DIGITAL INPUTS JEDEC-compliant
Input High Voltage 1.7 V min V
CC
= 2.7 V to 3.6 V
2.0 V min V
CC
= 3.6 V to 5.5 V
Input Low Voltage 0.8 V max V
CC
= 2.7 V to 5.5 V
Input Current (with pull-up/pull-down) ±8 μA max
SER/PAR
, FIFOEN, and RESET pins only
Input Current (no pull-up/pull-down) ±1 μA max All other digital input pins
Input Capacitance
2
10 pF max
DIGITAL OUTPUTS (BUSY, SDO)
Output Low Voltage 0.5 V max Sinking 200 μA
Output High Voltage (SDO) V
CC
− 0.5 V min Sourcing 200 μA
High Impedance Leakage Current −70 μA max SDO only
High Impedance Output Capacitance
2
10 pF typ
AD5378
Rev. A | Page 5 of 28
Parameter A Version
1
Unit Test Conditions/Comments
POWER REQUIREMENTS
V
CC
2.7/5.5 V min/max
V
DD
8.5/16.5 V min/max
V
SS
−3/−16.5 V min/max
Power Supply Sensitivity
2
∆ Full Scale/∆ V
DD
−75 dB typ
∆ Full Scale/∆ V
SS
−75 dB typ
∆ Full Scale/∆ V
CC
−90 dB typ
I
CC
5 mA max V
CC
= 5.5 V, V
IH
= V
CC
, V
IL
= GND
I
DD
28 mA max Outputs unloaded; typically 20 mA
I
SS
23 mA max Outputs unloaded; typically 15 mA
Power Dissipation
Power Dissipation Unloaded (P) 850 mW max V
DD
= 16.5 V, V
SS
= −16.5 V
Power Dissipation Loaded (P
TOTAL
) 2000 mW max P
TOTAL
= P + Σ(V
DD
− V
O
) × I
SOURCE
+ Σ(V
O
− V
SS
) × I
SINK
Junction Temperature 130 °C max T
J
= T
A
+ P
TOTAL
× θ
J
3
1
Temperature range for the A version: −40°C to +85°C. Typical specifications are at 25°C.
2
Guaranteed by design and characterization; not production tested.
3
Where θ
J
represents the package thermal impedance.
AC CHARACTERISTICS
V
CC
= 2.7 V to 5.5 V; V
DD
= 11.4 V to 16.5 V; V
SS
= −11.4 V to −16.5 V; V
REF
(+) = +5 V; V
REF
(−) = −3.5 V;
AGND = DGND = REFGND = 0 V; V
BIAS
= 5 V; C
L
= 220 pF; R
L
= 11 kΩ to 3 V; gain = 1; offset = 0 V.
Table 4.
Parameter A Version
1
Unit Test Conditions/Comments
DYNAMIC PERFORMANCE
Output Voltage Settling Time 20 μs typ Full-scale change to ±1/2 LSB
30 μs max
DAC latch contents alternately loaded with all 0s and
all 1s
Slew Rate 1 V/μs typ
Digital-to-Analog Glitch Energy 20 nV-s typ
Glitch Impulse Peak Amplitude 15 mV max
Channel-to-Channel Isolation 100 dB typ V
REF
(+) = 2 V p-p, (1 V
BIAS
) 1 kHz, V
REF
(−) = −1 V
DAC-to-DAC Crosstalk 40 nV-s typ
See the Terminology section; between DACs inside a
group
10 nV-s typ Between DACs from different groups
Digital Crosstalk 0.1 nV-s typ
Digital Feedthrough 1 nV-s typ Effect of input bus activity on DAC output under test
Output Noise Spectral Density @ 1 kHz 350 nV/(Hz)
1/2
typ V
REF
(+) = V
REF
(−) = 0 V
1
Guaranteed by design and characterization; not production tested.
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AD5378ABCZ

Mfr. #:
Buy AD5378ABCZ
Manufacturer:
Analog Devices Inc.
Description:
Digital to Analog Converters - DAC 32-CH 14BIT BIPOLAR VOUT IC
Lifecycle:
New from this manufacturer.
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