LTC4222
15
4222fb
APPLICATIONS INFORMATION
fault is declared for that supply and the MOSFET is turned
off. If the CONFIG pin is low, then both channels will turn
off together. After the switch has turned off due to an
OC fault the part will wait for a cool-down period before
allowing the switch to turn on again. If the TIMER pin is
tied to V
CC
the cool-down period will be 5 seconds on the
internal timer. Otherwise if using a TIMER capacitor, the
capacitor will discharge at 2µA and the internal 100ms timer
is started, when the 100ms timer expires and the TIMER
pin reaches its 0.2V lower threshold the part is allowed to
restart if the overcurrent fault bit (FAULT register bit 2) has
been cleared or the overcurrent auto-retry bit (CONTROL
register bit 2) has been set.
After start-up, a supply has dual-level glitch-tolerant protec-
tion against overcurrent faults. The sense resistor voltage
drop is monitored by a 50mV electronic circuit breaker and
a 150mV active current limit. In the event that a supply’s
current exceeds the circuit breaker threshold, an internal
20µs timer is started. If the supply is still overcurrent after
20µs the circuit breaker trips and the switch is turned off.
An analog current limit loop prevents the supply current
from exceeding the 150mV current limit in the event of a
short circuit. The 20µs filter delay and the higher current
limit threshold prevent unnecessary resets of the board
due to minor current surges. The LTC4222 will stay in
the latched off state unless the overcurrent auto-retry bit
(CONTROL register bit 2) is set, in which case the switch
turns on again after 100ms when using the external TIMER
capacitor to set the start-up time, or 5 seconds when using
the internal timer. Note that current limit foldback is not
active after start-up.
Overvoltage Fault
An overvoltage fault occurs when an OV pin rises above
its 1.235V threshold for more than 2µs. This shuts off
the corresponding GATE with a 1mA current to ground
and sets the overvoltage present STATUS bit 0 and the
overvoltage FAULT bit 0. If the pin subsequently falls back
below the threshold for 100ms, the GATE is allowed to turn
on again unless overvoltage auto-retry has been disabled
by clearing CONTROL bit 0. If the CONFIG pin is tied low,
an OV fault on either channel will shut off both channels
simultaneously.
Undervoltage Fault
An undervoltage fault occurs when a UV pin falls below
its 1.235V threshold for more than 2µs. This turns off the
corresponding GATE with a 1mA current to ground and
sets undervoltage present STATUS bit 1 and undervoltage
FAULT bit 1. If the UV pin subsequently rises above the
threshold for 100ms, the GATE is turned on again unless
undervoltage auto-retry has been disabled by clearing
CONTROL bit 1. When power is applied to the device, if
UV is below its 1.235V threshold after INTV
CC
crosses its
2.64V undervoltage lockout threshold, an undervoltage
fault is logged in the FAULT register. If the CONFIG pin is
tied low, an UV fault on either channel will shut off both
channels simultaneously.
ON Signals and the CONFIG Pin
Turn-on commands are issued from the ON pins or the I
2
C
interface. Internally, rising and falling edges of the ON pins
set and reset the FET_ON register bits. Unlike the other
control signals such as UV, OV and EN, the rising edge of
the ON signal is not filtered by the 100ms internal timer and
instead turns on the corresponding channel immediately.
Cycling an ON signal cancels the corresponding channel’s
overcurrent auto-retry cool-down period, allowing the
channel to restart after a 100ms delay.
To start up and shut down both channels at the same time
set the CONFIG pin low. Both channels then start up when
all the UV, OV, EN and ON signals are in the correct state
to turn on both channels, and when any of these signals
turns one channel off, both channels turn off.
Figure 3. Short-Circuit Waveform
V
GPIO
5V/DIV
V
GATE
10V/DIV
C
L
= 0F
R
SHORT
= 5mΩ
R
S
= 20mΩ
R
G
= 1k
C
G
= 1µF
V
SOURCE
10V/DIV
LOAD CURRENT
5A/DIV
4222 F03
10µs/DIV
