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X9110TV14IZ-2.7

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18
X9110
16
FN8158.5
October 28, 2016
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FIGURE 18. ATTENUATOR FIGURE 19. FILTER
FIGURE 20. INVERTING AMPLIFIER FIGURE 21. EQUIVALENT L-R CIRCUIT
FIGURE 22. FUNCTION GENERATOR
Application Circuits (Continued)
+
–
V
S
V
O
R
3
R
1
R
2
R
4
R
1
= R
2
= R
3
= R
4
= 10kΩ
V
O
= G V
S
-1/2 ≤ G ≤ +1/2
+
–
V
S
R
2
R
1
R
C
V
O
G
O
= 1 + R
2
/R
1
fc = 1/(2RC)
+
–
V
S
V
O
R
2
R
1
}
}
V
O
= G V
S
G = - R
2
/R
1
+
–
V
S
R
2
C
1
R
1
R
3
Z
IN
Z
IN
= R
2
+ s R
2
(R
1
+ R
3
) C
1
= R
2
+ s Leq
(R
1
+ R
3
) >> R
2
+
–
R
2
+
–
R
1
}
}
R
A
R
B
C
frequency R
1
, R
2
, C
amplitude R
A
, R
B
X9110
17
Intersil products are manufactured, assembled and tested utilizing ISO9001 quality systems as noted
in the quality certifications found at www.intersil.com/en/support/qualandreliability.html
Intersil products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design, software and/or specifications at any time
without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be
accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third
parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see www.intersil.com
FN8158.5
October 28, 2016
For additional products, see www.intersil.com/en/products.html
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About Intersil
Intersil Corporation is a leading provider of innovative power management and precision analog solutions. The company's products
address some of the largest markets within the industrial and infrastructure, mobile computing and high-end consumer markets.
For the most updated datasheet, application notes, related documentation and related parts, please see the respective product
information page found at www.intersil.com.
You may report errors or suggestions for improving this datasheet by visiting www.intersil.com/ask
.
Reliability reports are also available from our website at www.intersil.com/support.
Revision History The revision history provided is for informational purposes only and is believed to be accurate, however, not
warranted. Please visit our website to make sure that you have the latest revision.
DATE REVISION CHANGE
October 28, 2016 FN8158.5 Added Related Literature section on page 1.
Updated f
SCK
maximum specification on page 12.
August 3, 2016 FN8158.4 Updated entire datasheet applying Intersil’s new standards.
Updated Note 1 and added Note 3.
Changed the maximum limit for parameter Vcc Current (standby) ISB from 3µA to 5µA on page 11.
Added Revision History and About Intersil sections.
Updated POD to latest revision changes are as follows:
Updated drawing to remove table and added land pattern.
X9110
18
FN8158.5
October 28, 2016
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Package Outline Drawing
M14.173
14 LEAD THIN SHRINK SMALL OUTLINE PACKAGE (TSSOP)
Rev 3, 10/09
DETAIL "X"
SIDE VIEW
TYPICAL RECOMMENDED LAND PATTERN
TOP VIEW
B
A
17
8
14
C
PLANE
SEATING
0.10 C
0.10 CBA
H
PIN #1
I.D. MARK
5.00 ±0.10
4.40 ±0.10
0.25 +0.05/-0.06
6.40
0.20 C B A
0.05
0°-8°
GAUGE
PLANE
SEE
0.90 +0.15/-0.10
0.60 ±0.15
0.09-0.20
5
2
31
3
1.00 REF
0.65
1.20 MAX
0.25
0.05 MIN
0.15 MAX
(1.45)
(5.65)
(0.65 TYP) (0.35 TYP)
DETAIL "X"
1. Dimension does not include mold flash, protrusions or gate burrs.
Mold flash, protrusions or gate burrs shall not exceed 0.15 per side.
2. Dimension does not include interlead flash or protrusion. Interlead
flash or protrusion shall not exceed 0.25 per side.
3. Dimensions are measured at datum plane H.
4. Dimensioning and tolerancing per ASME Y14.5M-1994.
5. Dimension does not include dambar protrusion. Allowable protrusion
shall be 0.80mm total in excess of dimension at maximum material
condition. Minimum space between protrusion and adjacent lead is 0.07mm.
6. Dimension in ( ) are for reference only.
7. Conforms to JEDEC MO-153, variation AB-1.
NOTES:
END VIEW
For the most recent package outline drawing, see M14.173.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18

X9110TV14IZ-2.7

Mfr. #:
Buy X9110TV14IZ-2.7
Manufacturer:
Renesas / Intersil
Description:
Digital Potentiometer ICs SINGLE DCP 100KOHM 1024 TAP SPI
Lifecycle:
New from this manufacturer.
Delivery:
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