DS2417
INTERRUPT TIMING Figure 11
Time
= 122 µs
t
INTERVAL
t
PULSE
t
LATENCY
V
INT
Case A: Latency < 0.5
t
INTERVAL
13 of 15
Case B: 0 < Latency <
t
INTERVAL
Time
= 122 µs
t
INTERVAL
t
PULSE
t
LATENCY
V
INT
The latency depends on the selected interrupt interval (IS0 to IS2 settings) and the contents of the RTC
counter at the time of writing the device control byte. In Case A, the flip-flop that determines the interval
duration is reset and toggles before half of the interval time is over. In Case B, this flip-flop is set that
generates an immediate interrupt pulse; the latency, therefore, can be up to one full interval duration.
If enabled, the interrupt pulse may also be triggered while reading from or writing to the control byte.
DS2417
ABSOLUTE MAXIMUM RATINGS*
Voltage on 1-Wire to Ground -0.5V to +7.0V
Operating Temperature Range -40°C to +85°C
Storage Temperature Range -55°C to +125°C
Soldering Temperature See J-STD-020A Specification
* This is a stress rating only and functional operation of the device at these or any other conditions
above those indicated in the operation sections of this specification is not implied. Exposure to abso-
lute maximum rating conditions for extended periods of time may affect reliability.
DC ELECTRICAL CHARACTERISTICS
(V
PUP
= 2.5V to 6.0V; V
DD
= 2.5V to 5.5V, -40°C to +85°C)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Logic 1 V
IH1
2.2 6.0 V 1, 11
Logic 0 V
IL1
-0.3 TBD V 1, 6
Output Logic Low @ 4mA V
OL1
0.4 V 1
Output Logic High V
OH1
V
PUP
V 1, 3
Input Load Current I
L1
5 µA 4
Interrupt Sink Current
@ 0.4V
I
INT3
5 mA 9
Operating Current (Osc. On) I
DD3
250 nA 2, 9
Quiescent Current (Osc. Off) I
DDQ3
50 nA 2, 8, 9
Interrupt Sink Current
@ 0.4V
I
INT5
10 mA 10
Operating Current (Osc. On) I
DD5
450 nA 2, 10
Quiescent Current (Osc. Off) I
DDQ5
100 nA 2, 8, 10
CAPACITANCE (T
A
= 25°C)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Capacitance 1-Wire C
IN
50 pF
AC ELECTRICAL CHARACTERISTICS
(V
PUP
= 2.5V to 6.0V; V
DD
= 2.5V to 5.5V, -40°C to +85°C)
PARAMETER SYMBOL MIN TYP MAX UNITS NOTES
Time Slot t
SLOT
60 120 µs
Write 1 Low Time t
LOW1
1 15 µs 13
Write 0 Low Time t
LOW0
60 120 µs
Read Low Time t
LOWR
1 15 µs 13
Read Data Valid t
RDV
15 µs 12
Release Time t
RELEASE
0 15 45 µs
Read Data Setup t
SU
1 µs 5
Recovery Time t
REC
1 µs
Reset High Time t
RSTH
480 µs
Reset Low Time t
RSTL
480 960 µs 7
Presence Detect High t
PDH
15 60 µs
Presence Detect Low t
PDL
60 240 µs
14 of 15
DS2417
NOTES:
1. All voltages are referenced to ground.
2. Measured with outputs open.
3. V
PUP
= external pullup voltage.
4. Input load is to ground.
5. Read data setup time refers to the time the host must pull the 1-Wire bus low to read a bit. Data is
guaranteed to be valid within 1 µs of this falling edge.
6. Under certain low voltage conditions V
IL1MAX
may have to be reduced to as much as 0.5V to always
guarantee a presence pulse.
7. The reset low time (t
RSTL
) should be restricted to a maximum of 960µs, to allow interrupt signaling,
otherwise, it could mask or conceal interrupt pulses.
8. When V
DD
ramps up, the oscillator is always off.
9. At V
DD
= 3V ± 10%
10. At V
DD
= 5V ± 10%
11. V
IH1
has to be V
DD
– 0.3V or higher.
12. The optimal sampling point for the master is as close as possible to the end time of the 15μs t
RDV
period without exceeding t
RDV
. For the case of a Read-One Time Slot, this maximizes the amount of
time for the pull-up resistor to recover to a high level. For a Read-Zero Time Slot, it ensures that a
read will occur before the fastest 1-Wire device(s) release the line.
13. The duration of the low pulse sent by the master should be a minimum of 1μs with a maximum value
as short as possible to allow time for the pull-up resistor to recover the line to a high level before the
1-Wire device samples in the case of a Write-One Time or before the master samples in the case of a
Read-One Time.
PACKAGE INFORMATION
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.
PACKAGE TYPE PACKAGE CODE DOCUMENT NO.
6 TSOC D6+1 21-0382
6 Flip Chip BF611-2 21-0289
15
Maxim Integrated 160 Rio Robles, San Jose, CA 95134 USA 1-408-601-1000
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied.
Maxim reserves the right to change the circuitry and specifications without notice at any time. The parametric values (min and max limits) shown in the Electrical
Characteristics table are guaranteed. Other parametric values quoted in this data sheet are provided for guidance.
©
2007 Maxim Integrated
The Maxim logo and Maxim Integrated are trademarks of Maxim Integrated Products, Inc.

DS2417P

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Description:
IC RTC BINARY CNT SER 6-TSOC
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