AD8034ARTZ-R2 Datasheet AD8033AKSZ-REEL7, AD8033ARZ, AD8034ARZ | P19-P21

AD8033/AD8034

Rev. D | Page 19 of 24

APPLICATIONS INFORMATION

HIGH SPEED PEAK DETECTOR

The low input bias current and high bandwidth of the AD8033/

AD8034 make the parts ideal for a fast settling, low leakage peak

detector. The classic fast-low leakage topology with a diode in

the output is limited to ~1.4 V p-p maximum in the case of the

AD8033/AD8034 because of the protection diodes across the

inputs, as shown in Figure 54.

AD8033/

AD8034

~1.4V p-p MAX

OUT

02924-054

Figure 54. High Speed Peak Detector with Limited Input Range

Using the AD8033/AD8034, a unity gain peak detector can

be constructed that captures a 300 ns pulse while still taking

advantage of the low input bias current and wide common-

mode input range of the AD8033/AD8034, as shown in Figure 55.

Using two amplifiers, the difference between the peak and the

current input level is forced across R2 instead of either amplifier’s

input pins. In the event of a rising pulse, the first amplifier

compensates for the drop across D2 and D3, forcing the voltage

at Node 3 equal to Node 1. D1 is off and the voltage drop across

R2 is zero. Capacitor C3 speeds up the loop by providing the

charge required by the input capacitance of the first amplifier,

helping to maintain a minimal voltage drop across R2 in the

sampling mode. A negative going edge results in D2 and D3

turning off and D1 turning on, closing the loop around the

first amplifier and forcing V

OUT

− V

across R2. R4 makes

the voltage across D2 zero, minimizing leakage current and

kickback from D3 from affecting the voltage across C2.

The rate of the incoming edge must be limited so that the output

of the first amplifier does not overshoot the peak value of V

before the output of the second amplifier can provide negative

feedback at the summing junction of the first amplifier. This

is accomplished with the combination of R1 and C1, which

allows the voltage at Node 1 to settle to 0.1% of V

in 270 ns.

The selection of C2 and R3 is made by considering droop

rate, settling time, and kickback. R3 prevents overshoot from

occurring at Node 3. The time constants of R1, C1 and R3, C2

are roughly equal to achieve the best performance. Slower time

constants can be selected by increasing C2 to minimize droop

rate and kickback at the cost of increased settling time. R1 and

C1 should also be increased to match, reducing the incoming

pulse’s effect on kickback.

AD8034

1/2

10pF

1kΩ

AD8034

1/2

–V

39pF/

120pF

LS4148

49.9Ω

4.7pF

6kΩ

LS4148

–V

LS4148

200Ω

180pF/

560pF

OUT

2924-056

Figure 55. High Speed, Unity Gain Peak Detector Using AD8034

AD8033/AD8034

Rev. D | Page 20 of 24

1V/DIV 100ns/DIV

02924-055

OUTPUT

INPUT

Figure 56. Peak Detector Response 4 V, 300 ns Pulse

Figure 56 shows the peak detector in Figure 55 capturing a

300 ns, 4 V pulse with 10 mV of kickback and a droop rate of

5 V/s. For larger peak-to-peak pulses, increase the time constants

of R1, C1 and R3, C3 to reduce overshoot. The best droop rate

occurs by isolating parasitic resistances from Node 3, which can

be accomplished using a guard band connected to the output of the

second amplifier that surrounds its summing junction (Node 3).

Increasing both time constants by a factor of 3 permits a larger

peak pulse to be captured and increases the output accuracy.

1V/DIV 200ns/DIV

02924-057

OUTPUT

INPUT

Figure 57. Peak Detector Response 5 V, 1 μs Pulse

Figure 57 shows a 5 V peak pulse being captured in 1 µs with

less than 1 mV of kickback. With this selection of time constants,

up to a 20 V peak pulse can be captured with no overshoot.

ACTIVE FILTERS

The response of an active filter varies greatly depending on the

performance of the active device. Open-loop bandwidth and

gain, along with the order of the filter, determines the stop-band

attenuation as well as the maximum cutoff frequency, while

input capacitance can set a limit on which passive components

are used. Topologies for active filters are varied, and some are

more dependent on the performance of the active device than

others are.

The Sallen-Key topology is the least dependent on the active

device, requiring that the bandwidth be flat to beyond the stop-

band frequency because it is used simply as a gain block. In the

case of high Q filter stages, the peaking must not exceed the open-

loop bandwidth and the linear input range of the amplifier.

Using an AD8033/AD8034, a 4-pole cascaded Sallen-Key filter

can be constructed with f

= 1 MHz and over 80 dB of stop-band

attenuation, as shown in Figure 58.

–V

10pF

–V

4.22kΩ

AD8034

1/2

AD8034

1/2

6.49kΩ

49.9Ω

27pF

33pF

4.99kΩ

82pF

OUT

02924-058

Figure 58. 4-Pole Cascade Sallen-Key Filter

Component values are selected using a normalized cascaded,

2-stage Butterworth filter table and Sallen-Key 2-pole active

filter equations. The overall frequency response is shown in

Figure 59.

10M1M10k

FREQUENCY (Hz)

–100

REF LEVEL (dB)

–90

–80

–70

–60

–50

–40

–30

–20

–10

100k

2924-059

Figure 59. 4-Pole Cascade Sallen-Key Filter Response

AD8033/AD8034

Rev. D | Page 21 of 24

When selecting components, the common-mode input capacitance

must be taken into consideration.

Filter cutoff frequencies can be increased beyond 1 MHz using the

AD8033/AD8034 but limited open-loop gain and input impedance

begin to interfere with the higher Q stages. This can cause early

roll-off of the overall response.

Additionally, the stop-band attenuation decreases with decreasing

open-loop gain.

Keeping these limitations in mind, a 2-pole Sallen-Key Butterworth

filter with f

= 4 MHz can be constructed that has a relatively

low Q of 0.707 while still maintaining 15 dB of attenuation an

octave above f

and 35 dB of stop-band attenuation. The filter

and response are shown in Figure 60 and Figure 61, respectively.

–V

2.49kΩ

22pF

OUT

AD8033

2.49kΩ

49.9Ω

10pF

02924-060

Figure 60. 2-Pole Butterworth Active Filter

100M100k 1M

FREQUENCY (Hz)

–45

GAIN (dB)

–40

–35

–30

–25

–20

–15

–10

–5

2924-061

10M

Figure 61. 2-Pole Butterworth Active Filter Response

WIDEBAND PHOTODIODE PREAMP

Figure 62 shows an I/V converter with an electrical model of a

photodiode.

The basic transfer function is

PHOTO

OUT

RsC

where I

PHOTO

is the output current of the photodiode, and the

parallel combination of R

and C

sets the signal bandwidth.

= 10

Ω

PHOTO

02924-062

OUT

+ C

Figure 62. Wideband Photodiode Preamp

The stable bandwidth attainable with this preamp is a function

of R

, the gain bandwidth product of the amplifier, and the total

capacitance at the summing junction of the amplifier, including

and the amplifier input capacitance. R

and the total capacitance

produce a pole in the loop transmission of the amplifier that

can result in peaking and instability. Adding C

creates a zero

in the loop transmission that compensates for the effect of the

pole and reduces the signal bandwidth. It can be shown that the

signal bandwidth resulting in a 45°phase margin (f

(45)

) is defined

by the expression

××π

)45(

where:

is the amplifier crossover frequency.

is the feedback resistor.

is the total capacitance at the amplifier summing junction

(amplifier + photodiode + board parasitics).

The value of C

that produces f

(45)

××π

The frequency response in this case shows about 2 dB of

peaking and 15% overshoot. Doubling C

and cutting the

bandwidth in half results in a flat frequency response, with

about 5% transient overshoot.

P1-P3 P4-P6 P7-P9 P10-P12 P13-P15 P16-P18 P19-P21 P22-P24

AD8034ARTZ-R2

Mfr. #:

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Manufacturer:

Analog Devices Inc.

Description:

Operational Amplifiers - Op Amps SOT23 Hi-Speed Dual FET Input Amplifier

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AD8034ARTZ-R2

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