MAX9723
the headphone. The MAX9723A and MAX9723B have a
maximum amplifier gain of 0dB while the MAX9723C
and MAX9723D have a maximum gain of +6dB.
Amplifier volume is digitally programmable to any one
of 32 levels.
DirectDrive
Traditional single-supply headphone amplifiers have
their outputs biased at a nominal DC voltage, typically
half the supply, for maximum dynamic range. Large cou-
pling capacitors are needed to block this DC bias from
the headphone. Without these capacitors, a significant
amount of DC current flows to the headphone, resulting
in unnecessary power dissipation and possible damage
to both headphone and headphone amplifier.
Maxim’s DirectDrive architecture uses a charge pump to
create an internal negative supply voltage. This allows
the MAX9723 headphone amplifier outputs to be biased
at 0V, almost doubling the dynamic range while operat-
ing from a single supply. With no DC component, there is
no need for the large DC-blocking capacitors. Instead of
two large (typically 220µF) tantalum capacitors, the
MAX9723 charge pump requires only two small 1µF
ceramic capacitors, thereby conserving board space,
reducing cost, and improving the low-frequency
response of the headphone amplifier. See the Output
Power vs. Charge-Pump Capacitance and Load
Resistance graph in the Typical Operating Characteris-
tics for details of the possible capacitor sizes.
In addition to the cost and size disadvantages, the DC-
blocking capacitors required by conventional head-
phone amplifiers limit low-frequency response and can
distort the audio signal.
Previous attempts at eliminating the output-coupling
capacitors involved biasing the headphone return
(sleeve) to the DC bias voltage of the headphone
amplifiers. This method raises some issues:
1) The sleeve is typically grounded to the chassis.
Using the midrail biasing approach, the sleeve must
be isolated from system ground, complicating prod-
uct design. The DirectDrive output biasing scheme
allows the sleeve to be grounded.
2) During an ESD strike, the amplifier’s ESD structure is
the only path to system ground. The amplifier must
be able to withstand the full ESD strike. The
MAX9723 headphone outputs can withstand an
±8kV ESD strike (HBM).
3) When using the headphone jack as a line out to
other equipment, the bias voltage on the sleeve may
conflict with the ground potential from other equip-
ment, resulting in possible damage to the amplifiers.
The DirectDrive outputs of the MAX9723 can be
directly coupled to other ground-biased equipment.
Charge Pump
The MAX9723 features a low-noise charge pump. The
600kHz switching frequency is well beyond the audio
range, and does not interfere with the audio signals.
This enables the MAX9723 to achieve a 99dB SNR. The
switch drivers feature a controlled switching speed that
minimizes noise generated by turn-on and turn-off tran-
sients. Limiting the switching speed of the charge
pump minimizes di/dt noise caused by the parasitic
bond wire and trace inductance. Although not typically
required, additional high-frequency noise attenuation
can be achieved by increasing the size of C2 (see the
Functional Diagram/Typical Operating Circuit).
Shutdown
The MAX9723 features a 5µA, low-power shutdown
mode that reduces quiescent current consumption and
extends battery life. Shutdown is controlled by a hard-
ware or software interface. Driving SHDN low disables
the drive amplifiers, bias circuitry, charge pump, and
sets the headphone amplifier output impedance to
20kΩ. Similarly, the MAX9723 enters shutdown when bit
seven (B7) in the control register is reset. SHDN and B7
must be high to enable the MAX9723. The I
2
C interface
is active and the contents of the command register are
not affected when in shutdown. This allows the master
to write to the MAX9723 while in shutdown.
Stereo DirectDrive Headphone Amplifier
with BassMax, Volume Control, and I
2
C
10 ______________________________________________________________________________________
V
DD
+V
DD
-V
DD
V
DD
/2
GND
SGND
CONVENTIONAL AMPLIFIER BIASING SCHEME
DirectDrive BIASING SCHEME
Figure 1. Traditional Amplifier Output vs. MAX9723 DirectDrive
Output
Click-and-Pop Suppression
The output-coupling capacitor is a major contributor of
audible clicks and pops in conventional single-supply
headphone amplifiers. The amplifier charges the cou-
pling capacitor to its output bias voltage at startup.
During shutdown the capacitor is discharged. This
charging and discharging results in a DC shift across
the capacitor, which appears as an audible transient at
the speaker. Since the MAX9723 headphone amplifier
does not require output-coupling capacitors, no audi-
ble transients occur.
Additionally, the MAX9723 features extensive click-and-
pop suppression that eliminates any audible transient
sources internal to the device. The Power-Up/Power-
Down Waveform in the Typical Operating Characteristics
shows that there are minimal transients at the output upon
startup or shutdown.
In most applications, the preamplifier driving the
MAX9723 has a DC bias of typically half the supply.
The input-coupling capacitor is charged to the pream-
plifier’s bias voltage through the MAX9723’s input
impedance (R
IN
) during startup. The resulting voltage
shift across the capacitor creates an audible click/pop.
To avoid clicks/pops caused by the input filter, delay
the rise of SHDN by at least 4 time constants, 4 x R
IN
x
C
IN
, relative to the start of the preamplifier.
BassMax (Bass Boost)
Typical headphones do not have a flat-frequency
response. The small physical size of the diaphragm
does not allow the headphone speaker to efficiently
reproduce low frequencies. This physical limitation
results in attenuated bass response. The MAX9723
includes a bass boost feature that compensates for the
headphone’s poor bass response by increasing the
amplifier gain at low frequencies.
The DirectDrive output of the MAX9723 has more head-
room than typical single-supply headphone amplifiers.
This additional headroom allows boosting the bass fre-
quencies without the output-signal clipping.
Program the BassMax gain and cutoff frequency with
external components connected between OUT_ and
BB_ (see the Functional Diagram/Typical Operating
Circuit). Use the I
2
C-compatible interface to program the
command register to enable/disable the BassMax circuit.
BB_ is connected to the noninverting input of the output
amplifier when BassMax is enabled. BB_ is pulled to
SGND when BassMax is disabled. The typical application
of the BassMax circuit involves feeding a lowpass version
of the output signal back to the amplifier. This is realized
using positive feedback from OUT_ to BB_. Figure 2
shows the connections needed to implement BassMax.
Maximum Gain Control
The MAX9723A and MAX9723B have selectable
maximum gains of -5dB or 0dB (see Table 5) while
the MAX9723C and MAX9723D have selectable maxi-
mum gains of +1dB or +6dB (see Table 6). Bit 5 in the
command register selects between the two maximum
gain settings.
Volume Control
The MAX9723 includes a 32-level volume control that
adjusts the gain of the output amplifiers according to
the code contained in the command register. Volume is
programmed through the command register bits [4:0].
Tables 7–10 show all of the available gain settings for
the MAX9723A–MAX9723D. The mute attenuation is
typically better than 100dB when driving a 32Ω load.
Serial Interface
The MAX9723 features an I
2
C/SMBus-compatible,
2-wire serial interface consisting of a serial data line
(SDA) and a serial clock line (SCL). SDA and SCL facili-
tate communication between the MAX9723 and the
master at clock rates up to 400kHz. Figure 3 shows the
2-wire interface timing diagram. The MAX9723 is a
receive-only slave device relying on the master to gen-
erate the SCL signal. The MAX9723 cannot write to the
SDA bus except to acknowledge the receipt of data
MAX9723
Stereo DirectDrive Headphone Amplifier
with BassMax, Volume Control, and I
2
C
______________________________________________________________________________________ 11
C3
R2
R1
R
R
OUT_
BB_
AUDIO
INPUT
MAX9723
BassMax
ENABLE
Figure 2. BassMax External Connections
MAX9723
from the master. The master, typically a microcontroller,
generates SCL and initiates data transfer on the bus.
A master device communicates to the MAX9723 by
transmitting the proper address followed by the data
word. Each transmit sequence is framed by a START (S)
or REPEATED START (Sr) condition and a STOP (P) con-
dition. Each word transmitted over the bus is 8 bits long
and is always followed by an acknowledge clock pulse.
The MAX9723 SDA line operates as both an input and
an open-drain output. A pullup resistor, greater than
500Ω, is required on the SDA bus. The MAX9723 SCL
line operates as an input only. A pullup resistor, greater
than 500Ω, is required on SCL if there are multiple mas-
ters on the bus, or if the master in a single-master sys-
tem has an open-drain SCL output. Series resistors in
line with SDA and SCL are optional. Series resistors
protect the digital inputs of the MAX9723 from high-
voltage spikes on the bus lines, and minimize crosstalk
and undershoot of the bus signals.
Bit Transfer
One data bit is transferred during each SCL cycle. The
data on SDA must remain stable during the high period
of the SCL pulse. Changes in SDA while SCL is high
are control signals (see the START and STOP
Conditions section). SDA and SCL idle high when the
I
2
C bus is not busy.
Start and Stop Conditions
SDA and SCL idle high when the bus is not in use. A
master device initiates communication by issuing a
START condition. A START condition is a high-to-low
transition on SDA with SCL high. A STOP condition is a
low-to-high transition on SDA while SCL is high (Figure
4). A START condition from the master signals the begin-
ning of transmission to the MAX9723. The master termi-
nates transmission and frees the bus by issuing a STOP
condition. The bus remains active if a REPEATED START
condition is generated instead of a STOP condition.
Early STOP Conditions
The MAX9723 recognizes a STOP condition at any point
during data transmission except if the STOP condition
occurs in the same high pulse as a START condition.
Slave Address
The MAX9723 is available with one of two preset slave
addresses (see Table 1). The address is defined as the
seven most significant bits (MSBs) followed by the
Read/Write (R/W) bit. The address is the first byte of
information sent to the MAX9723 after the START condi-
tion. The MAX9723 is a slave device only capable of
being written to. The sent R/W bit must always be a
zero when configuring the MAX9723.
The MAX9723 acknowledges the receipt of its address
even if R/W is set to 1. However, the MAX9723 will not
drive SDA. Addressing the MAX9723 with R/W set to 1
causes the master to receive all 1’s regardless of the
contents of the command register.
Acknowledge
The acknowledge bit (ACK) is a clocked 9th bit that the
MAX9723 uses to handshake receipt of each byte of
Stereo DirectDrive Headphone Amplifier
with BassMax, Volume Control, and I
2
C
12 ______________________________________________________________________________________
SCL
SDA
START
CONDITION
STOP
CONDITION
REPEATED
START
CONDITION
START
CONDITION
t
HD, STA
t
SU, STA
t
HD, STA
t
SP
t
BUF
t
SU, STO
t
LOW
t
SU, DAT
t
HD, DAT
t
HIGH
t
R
t
F
Figure 3. 2-Wire Serial-Interface Timing Diagram

MAX9723BEBE+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Audio Amplifiers Stereo DirectDrive Headphone Amplifier
Lifecycle:
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