interest are not attenuated. For a typical application, set
f
POLE
equal to or below 20Hz.
Figure 13 shows the frequency response of the circuit
in Figure 12. With RA = 47kΩ, RB = 22kΩ, and CA =
0.33µF, the passband gain is set to 8.8dB.
Layout and Grounding
Proper layout and grounding are essential for optimum
performance. Connect PGND and SGND together at a
single point on the PC board. Connect PV
SS
to SV
SS
and bypass with a 1µF capacitor to PGND. Bypass V
DD
to PGND with a 1µF capacitor. Place the power-supply
bypass capacitor and the charge-pump capacitors as
close to the MAX9723 as possible. Route PGND and all
traces that carry switching transients away from SGND
and the audio signal path. Route digital signal traces
away from the audio signal path. Make traces perpen-
dicular to each other when routing digital signals over
or under audio signals.
The thin QFN package features an exposed paddle
that improves thermal efficiency. Ensure that the
exposed paddle is electrically isolated from PGND,
SGND, and V
DD
. Connect the exposed paddle to
SV
SS
when the board layout dictates that the
exposed paddle cannot be left floating.
CA
fRARB
POLE
()
=
×−
1
2 π
MAX9723
Stereo DirectDrive Headphone Amplifier
with BassMax, Volume Control, and I
2
C
______________________________________________________________________________________ 19
CA
RB
RA
R
R
OUT_
BB_
AUDIO
INPUT
MAX9723
BassMax
ENABLE
Figure 12. Using BassMax to Increase MAX9723’s Maximum
Gain
R2 (kΩ)A
V
GAIN (dB)
39 20.6
33 15.1
27 11.3
22 8.8
15 5.7
10 3.7
Table 12. BassMax Gain Examples
(R1 = 47kΩ)
C3 (nF) f
POLE
(Hz) f
ZERO
(Hz)
100 38 106
82 47 130
68 56 156
56 68 190
47 81 230
22 174 490
10 384 1060
Table 13. BassMax Pole and Zero
Examples for a Gain Boost of 8.8dB
(R1 = 47kΩ, R2 = 22kΩ)
FREQUENCY RESPONSE OF FIGURE 12
FREQUENCY (Hz)
A
V
(dB)
1k100101
1
2
3
4
5
6
7
8
9
10
0
0.1 10k
MAX9723A
CMD REGISTER
CODE = 0xFF
RA = 47kΩ
RB = 22kΩ
CA = 0.33μF
Figure 13. Increasing the Maximum Gain Using BassMax
MAX9723
UCSP Applications Information
For the latest application details on UCSP construction,
dimensions, tape carrier information, PC board tech-
niques, bump-pad layout, and recommended reflow tem-
perature profile, as well as the latest information on
reliability testing results, go to Maxim’s website at
www.maxim-ic.com/ucsp and look up Application Note
1891: Understanding the Basics of the Wafer-Level Chip-
Scale Package (WL-CSP).
Stereo DirectDrive Headphone Amplifier
with BassMax, Volume Control, and I
2
C
20 ______________________________________________________________________________________
Functional Diagram/Typical Operating Circuit
R5
10k
Ω
R6
10k
Ω
C
IN
0.47
μ
F
C4
0.1
μ
F
R4
22k
Ω
R3
47k
Ω
R1
47k
Ω
C5
1
μ
F
C2
1
μ
F
C
IN
0.47
μ
F
C1
1
μ
F
1.8V TO 3.6V
ANALOG INPUT
I
2
C INTERFACE
CHARGE PUMP
V
DD
INR
SDA
SCL
V
DD
V
DD
SV
SS
V
DD
R
OUTR
BBR
BBL
OUTL
R
SV
SS
V
DD
SV
SS
V
DD
SV
SS
SHDN
C1P
C1N
SGND PGND PV
SS
SV
SS
C3
0.1
μ
F
R2
22k
Ω
ANALOG INPUT
BASS BOOST CIRCUIT TUNED
FOR +8.8dB AT 106Hz.
MAX9723
R
INL
R
Chip Information
TRANSISTOR COUNT: 7165
PROCESS: BiCMOS
MAX9723
Stereo DirectDrive Headphone Amplifier
with BassMax, Volume Control, and I
2
C
______________________________________________________________________________________ 21
12
11
10
9
SV
SS
INR
INL
SGND
5
678
SCL
PV
SS
SDA
SHDN
16 15 14 13
BBL
OUTL
OUTR
BBR
1
2
3
4
V
DD
C1P
PGND
C1N
MAX9723_
TOP VIEW
TOP VIEW
(BUMP SIDE DOWN)
THIN QFN
UCSP
SHDN
C1N
PV
SS
SDA SGND
INLSCLPGND
C1P
V
DD
BBL BBR
INR
OUTL OUTR
SV
SS
MAX9723_
1234
A
B
C
D
+
R3
47k
Ω
R4
22k
Ω
R1
47k
Ω
C3
0.1
μ
F
C4
0.1
μ
F
R2
22k
Ω
OUTL
V
DD
PV
SS
C2
1
μ
F
C5
1
μ
F
R6
10k
Ω
R5
10k
Ω
I
2
C
MASTER
CODEC
SV
SS
PGND SGND
BBL
OUTR
BBR
1.8V TO
3.6V
SDA
SCL
INL
INR
C1P
C1N
C
IN
0.47
μ
F
C
IN
0.47
μ
F
C1
1
μ
F
MAX9723
System Diagram
Pin Configurations

MAX9723BEBE+T

Mfr. #:
Manufacturer:
Maxim Integrated
Description:
Audio Amplifiers Stereo DirectDrive Headphone Amplifier
Lifecycle:
New from this manufacturer.
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