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SC28L198A1BE,528

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57
Philips Semiconductors Product data sheet
SC28L198Octal UART for 3.3 V and 5 V supply voltage
2006 Aug 10
40
A(7:0) Read Write
UART G
11100000 (xE0) Mode Register g (MR2g) Mode Register g (MR2g)
11100001 (xE1) Status Register g (SRg) Command Register g (CRg)
11100010 (xE2) Interrupt Status Register g (ISRg) Interrupt Mask Register g (IMRg)
11100011 (xE3) Receiver FIFO Reg g (RxFIFOg) Transmitter FIFO Reg g (TxFIFOg)
11100100 (xE4) Input Port Reg g (IPRg) Reserved
11100101 (xE5) I/O Port Interrupt and Output g (I/OPIORg) I/O Port Interrupt and Output g (I/OPIORg)
11100110 (xE6) Xon/XoffInterrupt Status Reg g (XISRg) Reserved
11100111 (xE7) Reserved Reserved
11101000 (xE8) Reserved Reserved
11101001 (xE9) Reserved Reserved
11101010 (xEA) Reserved Reserved
11101011 (xEB) Reserved Reserved
11101100 (xEC) Reserved Reserved
11101101 (xED) Reserved Reserved
11101110 (xEE) Reserved Reserved
11101111 (xEF) Reserved Reserved
UART H
11110000 (xF0) Mode Register h (MR2h) Mode Register h (MR2h)
11110001 (xF1) Status Register h (SRh) Command Register h (CRh)
11110010 (xF2) Interrupt Status Register h (ISRh) Interrupt Mask Register h (IMRh)
11110011 (xF3) Receiver FIFO Reg h (RxFIFOh) Transmitter FIFO Reg h (TxFIFOh)
11110100 (xF4) Input Port Reg h (IPRh) Reserved
11110101 (xF5) I/O Port Interrupt and Output h (I/OPIORh) I/O Port Interrupt and Output h (I/OPIORh)
11110110 (xF6) Xon/XoffInterrupt Status Reg h (XISRh) Reserved
11110111 (xF7) Reserved Reserved
11111000 (xF8) Reserved Reserved
11111001 (xF9) Reserved Reserved
11111010 (xFA) Reserved Reserved
11111011 (xFB) Reserved Reserved
11111100 (xFC) Reserved Reserved
11111101 (xFD) Reserved Reserved
11111110 (xFE) Reserved Reserved
11111111 (xFF) Reserved Reserved
Philips Semiconductors Product data sheet
SC28L198Octal UART for 3.3 V and 5 V supply voltage
2006 Aug 10
41
RESET CONDITIONS
Device Configuration after Hardware Reset or CRa
cmd=x1F
Cleared registers:
Channel Status Registers (SR)
Channel Interrupt Status Registers (ISR)
Channel Interrupt Mask Registers (IMR)
Channel Interrupt Xon Status Register (XISR)
Interrupt Control Register (ICR)
Global Configuration Control Register (GCCR)
Hence the device enters the asynchronous bus cycling mode.
Current Interrupt Register (CIR)
BRG Timer Run Control Register (BRGTCR)
Watch-dog Timer Run Control Register (WDTRCR)
Channel Input/Output Port Configuration Registers (I/OPCR)
Hence all I/O pins have direction = Input after reset
BRG Counter/Timer Registers
Clears Modes for:
Power down
Test modes
Input Port Changed bits
Gang write to Xon or Xoff
Xon/Xoff/Address detection
Receiver error status
Disables:
Transmitters
Receivers
Interrupts, current and future
Halts:
BRG Counters
Bus cycle in progress (hardware RESET only)
Limitations:
Minimum RESETN pin pulse width is 10 SClk cycles after Vcc
reaches operational range
The user must allow a minimum of 6 SClk cycles to elapse after
a reset (RESETN pin or CRa initiated) of the device terminates
before initiating a new bus cycle.
Philips Semiconductors Product data sheet
SC28L198Octal UART for 3.3 V and 5 V supply voltage
2006 Aug 10
42
DC ELECTRICAL SPECIFICATIONS FOR COMMERCIAL AND INDUSTRIAL (5V)
V
CC
= 5.0 volts 10%; T
A
= –40 °C to +85°C; unless otherwise specified
SYMBOL PARAMETER TEST LIMITS UNIT
CONDITIONS MIN TYP
1
MAX
V
IL
V
IH
V
IH
Input low voltage
2
Input high voltage (except X1/CLK)
Input high voltage (X1/CLK)
V
SS
2.0
0.8V
CC
0.8
Vcc
Vcc
V
V
OL
3
V
OH
V
OL
3
Output low voltage
4
Output high voltage (except OD outputs)
Open Drain low voltage
I
OL
= 4.0mA
I
OH
= –400 mA
I
OH
= –100 mA
I
OL
= 14.0 mA
0.8V
CC
0.9V
CC
0.15
<0.25
0.4
0.4
V
V
I
IL
I
IH
Input current low, I/O pins
Input current high, I/O pins
V
IN
= 0
Vi
N
= Vcc
–10 <0.1
<0.1
10
mA
I
L
Input leakage current V
IN
= 0 to Vcc –5 <1 5
mA
I
ILCKX1
I
IHCKX1
X1/CLK input low current
X1/CLK input high current
V
IN
=Vss,X2=Open
VIN=Vcc, X2=Open
–450
450
mA
I
OZH
I
OZL
Output off current high, 3–state data bus
Output off current low, 3–state data bus
V
IN
= V
CC
V
IN
= 0 –10
<.1
<.1
10
mA
mA
I
ODL
I
ODH
Open–drain output low current in off state
Open drain output high current in off state
V
IN
= 0
V
IN
= V
CC
–10 <.1
<.1
10
mA
I
CC
Power supply current
Operating mode 33 MHz
Static Power down (No clocks, Open–drains off,
inputs at V
SS
or V
CC
)
TTL Input levels
CMOS input levels
CMOS input levels
100
26
0.6
150
40
5
mA
mA
mA
NOTES:
1. Typical values are at +25 °C, typical supply voltage and typical processing parameters.
2. All voltage measurements are referenced to V
SS
. For testing, all inputs swing between 0.4 V and 2.4 V with a transition time of 10 ns
maximum. For X1/CLK this swing is between 0.4 V and 4.4 V. all time measurements are referenced at input voltages of V
IL
and V
IH
as
appropriate.
3. Test conditions for itnerrupt and I/O outputs: CL = 50 pF. Test conditions for the rest of the outputs: CL = 60 pF.
4. Simultaneous switching more than 6 I/O port pins from 5 volts to 0 volts at full capacitive load may ground bounce on the output pins up to
0.95 volts.
5. All R
X
, T
X
, Brg Timer, I/O pins operating at 16 MHz. Sclk at 35 MHz and V
CC
at 5.6 volts. A worst–case environment.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P24P25-P27P28-P30P31-P33P34-P36P37-P39P40-P42P43-P45P46-P48P49-P51P52-P54P55-P57

SC28L198A1BE,528

Mfr. #:
Buy SC28L198A1BE,528
Manufacturer:
NXP Semiconductors
Description:
UART Interface IC 3V-5V 8CH UART INTEL/MOT INTRF
Lifecycle:
New from this manufacturer.
Delivery:
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