Philips Semiconductors Product data sheet
SC28L198Octal UART for 3.3 V and 5 V supply voltage
2006 Aug 10
52
INDEX
Numbers
1x and 16x modes, Receiver, 9
1x and 16x modes, Transmitter, 9
A
Address Recognition Character Register, 25
ARCR, 25
Asynchronous bus cycle, 6
B
Baud Rate Generator , 7
BCRA, 25
BCRBRK, 24
BCRCOS, 24
BCRx, 24
Bidding Control Register – Address, 25
Bidding Control Register – Break Change, 24
Bidding Control Register – Change of State, 24
Bidding Control Register – Xon, 24
Block diagram, 6
Break, transmission of, 9
BRG Timer Control Register, 26
BRG Timer Reload Registers, Lower, 26
BRG Timer Reload Registers, Upper, 26
BRGCTCR , 26
BRGTRL, 26
BRGTRU, 26
C
CEN, 6
Channel Blocks, 7
Channel Status Register, 22
Character Recognition, 7
CharacterStripping, 11
CIR, 27
Clock Register, Rx & Tx, 20
Command Register, 21
COMMAND REGISTER TABLE, 22
CR , 21
Crystal oscillator, 7
Current Interrupt Register, 27
D
Description, 2
DESCRIPTION, over all, 6
F
Framing error, 10
G
GCCR, 17
General Purpose Output Clk Register, 29
General Purpose Output Data Register, 29
General Purpose Output Register, 29
General Purpose Output Select Register, 29
General Purpose Pins, 11
GIBCR, 28
GICR, 27
GITR, 28
Global Configuration Control Register (GCCR), 17
Global Interrupting Byte Count Register, 28
Global Interrupting Channel Register, 27
Global Registers, 8, 11
Global RxFIFO Register, 28
Global TxFIFO Register, 28
GPOC , 29
GPOD, 29
GPOR, 29
GPOSR, 29
GRxFIFO, 28
GTxFIFO, 28
H
Host Interface, 6
Host interface, 6
I
I/O Port Configuration Register, 29
I/O Port Interrupt and Output Register, 28
I/O ports, 10
I/OPCR, 10, 29
I/OPIOR, 28
IACKN, 8
IACKNCycle, 12
ICR, 27
IMR, 8, 24
INDEX, 51
Input Port Register, 28
Interrupt Arbitration, 11
Interrupt Control, 8
Interrupt Mask Register, 24
Interrupt priorities, Setting, 12
Interrupt sources, Enabling, 12
Interrupt Status Register, 23
Interrupt Vector Register, 27
Interrupts, Xon/Xoff, 16
IOPIOR register, 11
IPR , 28
ISR, 8, 23
IVR, 27
M
Minor Modes, 14
Mode control, Xon/Xoff, 16
Mode Register 0, 18
Mode Register 1, 18
Mode Register 2, 19
Mode Registers, Initialization, 17
Modes of Operation, 13
MR0 , 18
MR1, 18
MR2, 19
Multidrop mode, 11
O
Overrun error, 10
P
Parity error, 10
Pin Description, 5
Pinout, 4
Polling, 12
R
Receiver, 9
Receiver FIFO, 10, 24
Receiver Status Bits, 9
REGISTER DESCRIPTIONS, 17
Register Map, 30
Register Map, Control, 30, 31
Register Map, Data, 31, 36
Reset Conditons, 40
RxCSR , 20
RxFIFO, 24
