XRD9827
22
Rev. 3.00
Figure 12. Timing Diagram for Figure 11
CCD Configuration (Charge Coupled Device)
Mode 1. AC Coupled
In the CCD configuration of operation, an external
capacitor needs to be chosen according to the equa-
tions below. The typical value for the external capacitor
is 100pF. This value should be adjusted according to
the time constant (Tc) needed in a particular applica-
tion. The CLAMP pin has an internal 150 ohm imped-
ance (R
INT
) which is in series with the external capacitor
(C
EXT
).
Therefore, Tc =1/R
INT
C
EXT
If the input to the external capacitor has a load imped-
ance (R
EXT
), then
T
c
=1/(R
INT
+R
EXT
)C
EXT
CIS Rotating Gain and Offset
Line-By-Line (Md 11)
ADCCLK
CIS
SYNCH
GAIN/
OFFSET
LD
Red Pixel Line Scan Grn Pixel Line Scan Blu Pixel Line Scan
Red Gain/Offset Cycle Grn Gain/Offset Cycle Blu Gain/Offset Cycle
Reset Internal Mux Color to Red Channel (LD = 110YYYYYY11)
tsa
tsypw
Note: Y = Previous State
Tri-State (SYNCH = LO)
When CLAMP (clamp) pin is set high an internal switch
allows one side of the external capacitor to be set to
VRT (Figure 13). This value corresponds to the black
reference of the CCD. When the CLAMP pin is set back
to low, the ADC samples the video signal with respect
to the black reference. The difference between the
black reference and the video signal is the actual pixel
value of the video content. Since this value is refer-
enced to the top ladder reference voltage of the ADC a
zero input signal would yield a full scale output code.
Therefore, the output of the conversion is inverted
(internally) to correspond to zero scale output code.
XRD9827
23
Rev. 3.00
Area or Linear CCD Applications
Figure 13 is a block diagram for applications with Area
or Linear CCDs (The timing for Area CCDs and B/W
CCDs is the same). For Area or Linear CCD applica-
tions, a global offset is loaded into the serial port at the
beginning of a line. The gain is set to adjust for the
highest color intensity of the CCD output. Once the
pixel values have been sampled, the gain and offset are
adjusted at the beginning of the next line. For example,
if there is a line-to-line variation between the black
reference pixels, the offset is adjusted. The gain is
always adjusted for the highest color intensity.
Figure 13. CCD AC Coupled Application
RL
VRT
VRB
VDD
RED
XRD9827
CLAMP
M
U
X
AREA
or
LINEAR
CCD
N/C
N/C
N/C
XRD9827
24
Rev. 3.00
Figure 14. Typical Application Circuitry Single
Channel CCD AC Coupled Inverted Mode
DVDD (3V - 5V)
AVDD
VCC (5V - 15V)
AGND
DIGITAL
ASIC
C
C
D
N/C
N/C
N/C
100PF
XRD9827
DVDD
1
DB0
2
DB1
3
DB2
4
DB3
5
DB4
6
DB5/SCLK
7
DB6/SDATA
8
DB7/LD
9
DGND
10
ADCCLK
11
CLAMP
12
SYNCH
13
AGND
14
VREF+
15
VDCEXT
16
BLU
17
GRN
18
RED
19
AVDD
20

XRD9827EVAL

Mfr. #:
Manufacturer:
MaxLinear
Description:
Data Conversion IC Development Tools XRD9827 EVAL BOARD
Lifecycle:
New from this manufacturer.
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