XRD9827
8
Rev. 3.00
ELECTRICAL CHARACTERISTICS
Test Conditions: AV
DD
=DV
DD
=3V, ADCCLK=6MHz, 50% Duty Cycle, T
A
=25°C unless otherwise specified.
Symbol Parameter Min. Typ. Max. Unit Conditions
Power Supplies
AV
DD
Analog Power Supply 3.0 3.3 5.5 V (Note 2)
DV
DD
Digital I/O Power Supply 3.0 3.3 5.5 V DV
DD
< AV
DD
I
DD
Supply Current 60 mA V
DD
=3V
IDD
PD
Power Down Power Supply Current 50 µA V
DD
=3V
ADC Specifications
RES Resolution 12 Bits
F
s
Maximum Sampling Rate 12 MSPS
DNL Differential Non-Linearity ±0.5 LSB
INL Integral Non-Linearity ±1.0 LSB
MON Monotonicity Yes
V
RT
Top Reference Voltage 2.1 2.2 2.34 V AV
DD
= DV
DD
= 3.0V
V
RB
Bottom Reference Voltage 0.3 V AV
DD
= DV
DD
= 3.0V
DV
REF
Differential Reference Voltage 2.0V V AV
DD
= DV
DD
= 3.0V
(V
RT
- V
RB
)
R
L
Ladder Resistance 300 600 780 Ω
PGA & Offset DAC Specifications
PGARES PGA Resolution 6 Bits
PGAG
MIN
Minimum Gain 0.950 1.0 1.050 V/V
PGAG
MAX
Maximum Gain 9.5 10.0 10.50 V/V
PGAGD Gain Adjustment Step Size 0.14 V/V
V
BLACK
Black Level Input Range -100 500 mV DC Configuration
DACRES Offset DAC Resolution 8 Bits
OFF
MIN
Minimum Offset Adjustment -200 mV Mode 111, D5=0 (Note 1)
OFF
MAX
Maximum Offset Adjustment +600 mV Mode 111, D5=0
OFF
MIN
Minimum Offset Adjustment -400 mV Mode 111, D5=1 (Note 1)
OFF
MAX
Maximum Offset Adjustment +400 mV Mode 111, D5=1
OFF∆ Offset Adjustment Step Size 3.14 mV
Note 1: The additional ±100 mV of adjustment with respect to the black level input range is needed to compensate
for any additional offset introduced by the XRD9827 Buffer/PGA internally.
Note 2: It is not recommended to operate the part between 3.6V and 4.4V.
