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932S431AGLFT

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21P22-P22
7
Integrated
Circuit
Systems, Inc.
ICS932S431A
Datasheet
1426A—11/12/09
Electrical Characteristics - PCICLK/PCICLK_F
PARAMETER SYMBOL CONDITIONS* MIN TYP MAX UNITS
NOTES
Long Accuracy ppm see Tperiod min-max values -100 100 ppm 1,2
Clock period T
p
eriod
33.33MHz output nominal 29.9970 30 30.0030 ns 2
Absolute Clock period T
pabs
33.33MHz output including jitter 29.4970 30.5030 ns 2
Clock High Time T
HI GH
1.5V 12 N/A
ns
1
Clock Low Time T
LOW
1.5V 12 N/A ns 1
Output Impedance R
DSP
V
O
= V
D
D
*(0.5) 12 55 1
Output High Voltage V
OH
I
OH
= -1 mA 2.4 V 1
Output Low Voltage V
OL
I
OL
= 1 mA 0.55 V 1
V
OH
@MIN = 1.0 V -33 mA 1
V
OH
@MAX = 3.135 V -33 mA 1
V
OL
@ MIN = 1.95 V 30 mA 1
V
OL
@ MAX = 0.4 V 38 mA 1
Edge Rate t
slewr/f
Rising/Falling edge rate 1 4 V/ns 1
Rise Time t
r
V
OL
= 0.4 V, V
OH
= 2.4 V 0.5 2 ns 1
Fall Time t
f
V
OH
= 2.4 V, V
OL
= 0.4 V 0.5 2 ns 1
Duty Cycle d
t1
V
T
= 1.5 V 45 55 % 1
Group Skew t
skew
V
T
= 1.5 V 250 ps 1
Jitter, Cycle to cycle t
j
c
y
c-c
y
c
V
T
= 1.5 V 500 ps 1
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%, (unless otherwise specified)
1
Guaranteed by design and characterization, not 100% tested in production.
2
All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REF is at 14.31818MHz
Output High Current I
OH
Output Low Current I
OL
Electrical Characteristics - USB48MHz
PARAMETER SYMBOL CONDITIONS* MIN TYP MAX UNITS
NOTES
Lon
g
Accurac
y
pp
m see T
p
eriod min-max values 0 0
pp
m1,2
Clock period T
p
eriod
48.00MHz output nominal 20.8333 20.83333 20.8333 ns 2
Absolute Clock period T
pabs
48.00MHz output including jitter 20.4833 21.1833 ns 2
Output Impedance R
DSP
V
O
= V
DD
*(0.5) 12 55
Ω
1
Output High Voltage V
OH
I
OH
= -1 mA 2.4 V 1
Clock High Time T
HIGH
1.5V 8.094 10.036
ns
1
Clock Low Time T
LO
W
1.5V 7.694 9.836 ns 1
Output Low Voltage V
OL
I
OL
= 1 mA 0.55 V 1
V
OH
@MIN = 1.0 V -29 mA 1
V
OH
@MAX = 3.135 V -33 mA 1
V
OL
@ MIN = 1.95 V 29 mA 1
V
OL
@ MAX = 0.4 V 27 mA 1
Edge Rate t
slewr/f_USB
Rising/Falling edge rate 1 2 V/ns 1
Rise Time t
r_USB
V
OL
= 0.4 V, V
OH
= 2.4 V 1 2 ns 1
Fall Time t
f_USB
V
OH
= 2.4 V, V
OL
= 0.4 V 1 2 ns 1
Duty Cycle d
t1
V
T
= 1.5 V 45 55 % 1
Group Skew t
skew
V
T
= 1.5 V 250 ps 1
Jitter, Cycle to cycle t
j
c
y
c-c
y
c
V
T
= 1.5 V 350 ps 1
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%
1
Guaranteed by design and characterization, not 100% tested in production.
2
All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REF is at 14.31818MHz
Output High Current I
OH
Output Low Current I
OL
8
Integrated
Circuit
Systems, Inc.
ICS932S431A
Datasheet
1426A—11/12/09
Electrical Characteristics - REF
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS Notes
Long Accuracy ppm see Tperiod min-max values -100 0 100 ppm 1,2
Clock period T
p
eriod
14.318MHz output nominal 69.8343 69.84128 69.8483 ns 2
Absolute Clock period T
pabs
14.318MHz output including
jitter
68.8343 70.8483 ns 2
Clock High Time T
HIG
H
1.5V 27.533718 N/A
ns
1
Clock Low Time T
LOW
1.5V 27.533718 N/A ns 1
Output High Voltage V
O
H
I
OH
= -1 mA 2.4 V 1
Output Low Voltage V
O
L
I
O
L
= 1 mA 0.4 V 1
V
OH
@MIN = 1.0 V -33 mA 1
V
O
H
@MAX = 3.135 V -33 mA 1
V
OL
@ MIN = 1.95 V 30 mA 1
V
OL
@ MAX = 0.4 V 38 mA 1
Edge Rate
t
slewr/f
Rising/Falling edge rate 1 4 V/ns 1
Rise Time t
r1
V
O
L
= 0.4 V, V
O
H
= 2.4 V 0.5 2 ns 1
Fall Time t
f1
V
O
H
= 2.4 V, V
OL
= 0.4 V 0.5 2 ns 1
Skew t
sk1
V
T
= 1.5 V 500 ps 1
Duty Cycle d
t1
V
T
= 1.5 V 45 55 % 1
Jitter t
j
c
y
c-c
y
c
V
T
= 1.5 V 1000 ps 1
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%
1
Guaranteed by design and characterization, not 100% tested in production.
2
All Long Term Accuracy and Clock Period specifications are guaranteed assuming that REF is at 14.31818MHz
Output High Current I
OH
Output Low Current I
OL
Electrical Characteristics - Differential Jitter Parameters
PARAMETER
Symbol Conditions Min
TYP
Max Units Notes
t
jphasePLL
PCIe Gen 1 30 86 ps (p-p) 1,2
t
jphaseLo
PCIe Gen 2
10kHz < f < 1.5MHz
0.9 3
ps
(RMS)
1,2
t
jphaseHigh
PCIe Gen 2
1.5MHz < f < Nyquist (50MHz)
1.9
3.1
ps
(RMS)
1,2
t
jphFBD1_3.2
G
FBD1 3.2/4G
11MHz to 33MHz
1.9 3
ps
(RMS)
1,2
t
jphFBD1_4.0
G
FBD1 4.8G
11MHz to 33MHz
1.4 2.5
ps
(RMS)
1,2
t
jphQPI
QPI 133MHz 6.4GB_12UI
CPU outputs onl
y
0.18 0.5
ps
(RMS)
1,2
*TA = 0 - 70°C; Supply Voltage VDD = 3.3 V +/-5%
1
Guaranteed by design and characterization, not 100% tested in production.
Jitter, Phase
2
See http://www.pcisig.com for compelte specs
9
Integrated
Circuit
Systems, Inc.
ICS932S431A
Datasheet
1426A—11/12/09
Electrical Characteristics - REF-14.318MHz
T
A
= 0 - 70°C; V
DD
= 3.3 V +/-5%; C
L
= 5 pF (unless otherwise specified)
PARAMETER SYMBOL CONDITIONS MIN TYP MAX UNITS NOTES
Long Accuracy ppm see Tperiod min-max values -300 0 300 ppm 1
Clock period T
p
eriod
14.318MHz output nominal 69.82033 69.86224 ns 1
Absolute Min/Max Clock
period
T
abs
Nominal 68.82033 70.86224 ns 2
Output High Voltage V
OH
I
OH
= -1 mA 2.4 V 1
Output Low Voltage V
OL
I
OL
= 1 mA 0.4 V 1
Output High Current I
OH
V
OH
@MIN = 1.0 V,
V
OH
@MAX = 3.135 V
-29 -23 mA 1
Output Low Current I
OL
V
OL
@MIN = 1.95 V,
V
OL
@MAX = 0.4 V
29 27 mA 1
Rise Time t
r1
V
OL
= 0.4 V, V
OH
= 2.4 V 0.5 2 ns 1
Fall Time t
f1
V
OH
= 2.4 V, V
OL
= 0.4 V 0.5 2 ns 1
Skew t
sk1
V
T
= 1.5 V 500 ps 1
Duty Cycle d
t1
V
T
= 1.5 V 45 55 % 1
Jitter t
j
c
y
c-c
y
c
V
T
= 1.5 V 1000 ps 1
1
Guaranteed by design, not 100% tested in production.
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932S431AGLFT

Mfr. #:
Buy 932S431AGLFT
Manufacturer:
IDT
Description:
Clock Synthesizer / Jitter Cleaner SERVER MAIN CLOCK
Lifecycle:
New from this manufacturer.
Delivery:
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