20
Using the 3GPP standards document Release 1999
version 2002‑6, the following channel conguration
was used to test ACLR. This table contains the power
levels of the main channels used for Test Model 1.
Note that the DPCH can be made up of 16, 32, or 64
separate channels each at dierent power levels and
timing osets. For a listing of power levels, channeliza‑
tion codes and timing oset see the entire 3GPP TS
25.141 V3.10.0 (2002‑06) standards document at: http://
www.3gpp.org/specs/specs.htm
Table 3. ACLR Channel Power Conguration.
3GPP TS 25.141 V3.10.0 (2002-06) Type Pwr (dB)
P‑CCPCH+SCH ‑10
Primary CPICH ‑10
PICH ‑18
S‑CCPCH containing PCH (SF=256) ‑18
DPCH‑64ch (SF=128) ‑1.1
Thermal Design
When working with medium to high power FET
devices, thermal dissipation should be a large part
of the design. This is done to ensure that for a given
ambient temperature the transistor’s channel does not
exceed the maximum rating, T
CH
, on the data sheet.
For example, ATF‑521P8 has a maximum channel tem‑
perature of 150°C and a channel to board thermal
resistance of 45°C/W, thus the entire thermal design
hinges from these key data points. The question that
must be answered is whether this device can operate
in a typical environment with ambient temperature
uctuations from ‑25°C to 85°C. From Figure 19, a very
useful equation is derived to calculate the temperature
of the channel for a given ambient temperature. These
calculations are all incorporated into Avago Technolo‑
gies AppCAD.
where,
θ
b –a
is the board to ambient thermal resistance;
θ
ch–b
is the channel to board thermal resistance.
The board to ambient thermal resistance thus becomes
very important for this is the designer’s major source
of heat control. To demonstrate the inuence of θ
b‑a,
thermal resistance is measured for two very dierent
scenarios using the ATF‑521P8 demoboard. The rst
case is done with just the demoboard by itself. The
second case is the ATF demoboard mounted on a
chassis or metal casing, and the results are given below:
Table 4. Thermal resistance measurements.
ATF Demoboard θ
b-a
PCB 1/8" Chassis 10.4°C/W
PCB no HeatSink 32.9°C/W
Therefore calculating the temperature of the channel
for these two scenarios gives a good indication of what
type of heat sinking is needed.
Case 1: Chassis Mounted @ 85°C
Tch = P x (θ
ch‑b
+ θ
b‑a
) + Ta
=.9W x (45+10.4)°C/W +85°C
Tch = 135°C
Case 2: No Heatsink @ 85°C
Tch = P x (θ
ch‑b
+ θ
b‑a
) + Ta
=.9W x (45+32.9)°C/W + 85°C
Tch = 155°C
In other words, if the board is mounted to a chassis, the
channel temperature is guaranteed to be 135°C safely
below the 150°C maximum. But on the other hand, if
no heat sinking is used and the θ
b‑a
is above 27°C/W
(32.9°C/W in this case), then the power must be derated
enough to lower the temperature below 150°C. This can
be better understood with Figure 20 below. Note power
is derated at 13 mW/°C for the board with no heat sink
and no derating is required for the chassis mounted
board until an ambient temperature of 100°C.
θ
ch-b
Tch
(channel)
Tb (board
or belly
of the part)
Ta
Ts (sink)
Pdiss = Vds x Ids
θ
b-s
θ
s-a
Figure 19. Equivalent Circuit for Thermal Resistance.
Hence very similar to Ohms Law, the temperature of the
channel is calculated with equation 8 below.
T
CH
= P
diss
(θ
ch–b
+ θ
b–s
+ θ
s–a
) + T
amb
(8)
If no heat sink is used or heat sinking is incorporated
into the PCB board then equation 8 may be reduced to:
T
CH
= P
diss
(θ
ch–b
+ θ
b–a
) + T
amb
(9)
Pdiss
(W)
0.9W
0 81 100 150 Tamb
No Heatsink
(13 mW/°C)
Mounted on Chassis
(18 mW/°C)
Figure 20. Derating for ATF- 521P8.
