LTC4217
7
4217fg
For more information www.linear.com/LTC4217
pin FuncTions
FB: Foldback and Power Good Input. Connect this pin to
an external resistive divider from OUT for the LTC4217
(adjustable) version. The LTC4217-12 version uses a fixed
internal divider with optional external adjustment. Open the
pin if the LTC4217-12 thresholds for 12V operation are
desired. If the voltage falls below 0.6V, the current limit is
reduced using a foldback profile (see the Typical Perfor-
mance Characteristics section). If the voltage falls below
1.21V, the PG pin will pull low to indicate the power is bad.
F LT : Overcurrent Fault Indicator. Open-drain output pulls
low when an overcurrent fault has occurred and the circuit
breaker trips. For overcurrent auto-retry tie to UV pin (see
the Applications Information section for details).
GATE: Gate Drive for Internal N-channel MOSFET. An
internal 24µA current source charges the gate of the
N-channel MOSFET. At start-up the GATE pin ramps up at
a 0.3V/ms rate determined by internal circuitry. During an
undervoltage or overvoltage condition a 250µA pull-down
current turns the MOSFET off. During a short-circuit or
undervoltage lockout condition, a 140mA pull-down cur-
rent source between GATE and OUT is activated.
GND: Device Ground.
I
MON
: Current Monitor Output. The current in the internal
MOSFET switch is divided by 20,000 and sourced from this
pin. Placing a 20k resistor from this pin to GND creates a
0V to 2V voltage swing when current ranges from 0A to 2A.
INTV
CC
: Internal 3.1V Supply Decoupling Output. This pin
must have a 1µF or larger bypass capacitor. Overloading
this pin can disrupt internal operation.
I
SET
: Current Limit Adjustment Pin. For a 2A current limit
value open this pin. This pin is driven by a 20k resistor
in series with a voltage source. The pin voltage is used
to generate the current limit threshold. The internal 20k
resistor (R
ISET
)) and an external resistor (R
SET
) between
I
SET
and ground create an attenuator that lowers the cur-
rent limit value. Due to circuit tolerance R
SET
should not be
less than 2k. In order to match the temperature variation
of the sense resistor, the voltage on this pin increases at
the same rate as the sense resistance increases. Therefore
the voltage at I
SET
pin is made proportional to temperature
of the MOSFET switch.
OUT: Output of Internal MOSFET Switch. Connect this pin
directly to the load. In the LTC4217-12 version, the PG
comparator monitors an internal resistive divider between
the OUT pin and GND.
OV: Overvoltage Comparator Input. Connect this pin to an
external resistive divider from V
DD
for the LTC4217 (adjust-
able) version. The LTC4217-12 version uses a fixed internal
divider with
optional external adjustment for 12V operation.
Open the pin if the LTC4217-12 thresholds are desired. If
the voltage at this pin rises above 1.235V, an overvoltage
is detected and the switch turns off. Tie to GND if unused.
PG: Power Good Indicator. Open-drain output pulls low
when the FB pin drops below 1.21V indicating the power is
bad. If the FB pin rises above 1.23V and the GATE to OUT
voltage exceeds 4.2V, the open-drain pull-down releases
the PG pin to go high.
SENSE: Current Sense Node and MOSFET Drain. The
current limit circuit controls the GATE pin to limit the
sense voltage between the V
DD
and SENSE pins to 15mV
(2A) or less depending on the voltage at the FB pin. The
exposed pad on DHC and FE packages are connected to
SENSE and must be soldered to an electrically isolated
printed circuit board trace to properly transfer the heat
out of the package.
TIMER: Timer Input. Connect a capacitor between this pin
and ground to set a 12ms/µF duration for current limit
before the switch is turned off. If the UV pin is toggled
low while the MOSFET switch is off, the switch will turn
on again following a cooldown time of 518ms/µF duration.
Tie this pin to INTV
CC
for a fixed 2ms overcurrent delay
and 100ms auto-retry time.
UV: Undervoltage Comparator Input. Tie high if unused.
Connect this pin to an external resistive divider from V
DD
for the LTC4217 (adjustable) version. The LTC4217-12
version drives the UV pin with an internal resistive divider
from V
DD
. Open the pin if the preset LTC4217-12 thresholds
for 12V operation are desired. If the UV pin voltage falls
below 1.15V, an undervoltage is detected and the switch
turns off. Pulling this pin below 0.62V resets the overcur
-
rent fault and allows the switch to turn back on (see the
Applications Information section for details). If overcurrent
auto-retry is desired then tie this pin to the F LT pin.
V
DD
: Supply Voltage and Current Sense Input. This pin
has an undervoltage lockout threshold of 2.73V.
LTC4217
8
4217fg
For more information www.linear.com/LTC4217
FuncTional DiagraM
4217 BD
R
ISET
20k
V
DD
UV
OUT
FB
PG
GND
I
MON
INTV
CC
INTV
CC
100µA
TIMER
F LT
+
I
SET
GATE
SENSE
(EXPOSED PAD)
X1
CLAMP
0.6V POSITIVE
TEMPERATURE
COEFFICIENT
REFERENCE
INTERNAL 25mΩ
MOSFET
INTERNAL 7.5mΩ
SENSE RESISTOR
CHARGE
PUMP
AND GATE
DRIVER
f = 2MHz
OUT
3.1V
GEN
LOGIC
INRUSHCS
CM
0.3V/ms
FOLDBACK
0.6V
2.65V
1.235V
+
+
PG
1.235V
+
UV
0.2V
+
TM1
1.235V
+
TM2
0.62V
+
RST
V
DD
V
DD
2.73V
+
UVLO1
OV
1.235V
+
OV
2µA
+
UVLO2
V
DD
V
DD
*
*
*
*
OUT
*
*
150k
20k
*LTC4217-12 (DFN) ONLY
140k
20k
224k
20k
6.15V
LTC4217
9
4217fg
For more information www.linear.com/LTC4217
operaTion
The Functional Diagram displays the main circuits of the
device. The LTC4217 is designed to turn a boards supply
voltage on and off in a controlled manner allowing the board
to be safely inserted and removed from a live backplane.
The LTC4217 includes a 25mΩ MOSFET and a 7.5mΩ
current sense resistor. During normal operation, the charge
pump and gate driver turn on the pass MOSFETs gate to
provide power to the load. The inrush current control is
accomplished by the INRUSH circuit. This circuit limits
the GATE ramp rate to 0.3V/ms and hence controls the
voltage ramp rate of the output capacitor.
The current sense (CS) amplifier monitors the load current
using the voltage sensed across the current sense resistor.
The CS amplifier limits the current in the load by reduc
-
ing the GATE-to-OUT voltage in an active control loop. It
is simple to adjust the current limit threshold using the
current limit adjustment (I
SET
) pin. This allows a different
threshold during other times such as start-up.
A short circuit on the output to ground causes significant
power dissipation during active current limiting. To limit
this power, the foldback amplifier reduces the current limit
value from 2A to 0.5A in a linear manner as the FB pin
drops below 0.6V (see the Typical Performance Charac
-
teristics section).
If an overcurrent condition persists, the TIMER pin ramps
up with a
100µA current source until the pin voltage exceeds
1.235V (comparator TM2). This indicates to the logic that
it is time to turn off the pass MOSFET to prevent overheat
-
ing. At this point the TIMER pin ramps down using the
2µA
current sour
ce until the voltage drops below 0.21V
(Comparator TM1) which tells the logic to start an internal
100ms timer. At this point, the pass transistor has cooled
and it is safe to turn it on again. It is suitable for many
applications to use an internal 2ms overcurrent timer with
a 100ms cooldown period. Tying the TIMER pin to INTV
CC
sets this default timing. Latchoff is the normal operating
condition following overcurrent turnoff. Retry is initiated
by pulling the UV pin low for a minimum of 1µs then high.
Auto retry is implemented by tying the F LT to the UV pin.
The fixed 12V version, LTC4217-12, uses two separate
internal dividers from V
DD
to drive the UV and OV pins.
This version also features a divider from OUT to drive the
FB pin. The LTC4217-12 is available in a DFN package
while the LTC4217 (adjustable version) is in a DFN and
TSSOP packages.
The output voltage is monitored using the FB pin and the
PG comparator to determine if the power is available for
the load. The power good condition is signaled by the PG
pin using an open-drain pull-down transistor.
The Functional Diagram also shows the monitoring blocks
of the LTC4217. The two comparators on the left side
include the UV and OV comparators. These comparators
determine if the external conditions are valid prior to turning
on the MOSFET. But first the undervoltage lockout circuits
UVLO1 and UVLO2 must validate the input supply and
the internally generated 3.1V supply (INTV
CC
) and gener-
ate the power up initialization to the logic circuits. If the
external conditions remain valid for 100ms
the MOSFET
is allowed to turn on.
Other features include MOSFET current and temperature
monitoring. The current monitor (CM) outputs a current
proportional to the sense resistor current. This current can
drive an external resistor or other circuits for monitoring
purposes. A voltage proportional to the MOSFET tempera-
ture is output to the I
SET
pin. The MOSFET is protected by
a thermal shutdown circuit.

LTC4217CDHC-12#PBF

Mfr. #:
Manufacturer:
Analog Devices Inc.
Description:
Hot Swap Voltage Controllers 2A Int Hot Swap Cntr
Lifecycle:
New from this manufacturer.
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