HI5728EVAL1 Datasheet HI5728EVAL1 | P1-P3

3-1

AN9827.2

HI5728EVAL1 User’s Manual

Description

The HI5728EVAL1 evaluation board provides a quick and

easy method for evaluating the HI5728, 125MSPS Dual High

Speed DAC. Each converter outputs a current into a load

resistor to form a voltage which can be measured by using

the included SMA connectors. The amount of current out of

the DAC is determined by an external resistor and either an

internal or external reference voltage. The evaluation board

also includes a VME digital interface that is compatible with

the HSP-EVAL board, so DDS (Direct Digital Synthesis) can

be performed with minimal setup time. A transformer is

included to take advantage of differential signal drive.

Features

• HI5728, 125MSPS CMOS DAC

• Simple and Easy to Use

• Standard VME/DSP Interface, HSP-EVAL Compatible

• SMA Outputs with Transformer Option

• Easily Selectable Internal or External Reference

Applications

• I and Q Signal Generation

• Modulated Carrier Generation

• General DAC Performance Evaluation

• Amplitude Modulation Via External Reference

Functional Block Diagram

Ordering Information

PART

NUMBER

TEMP.

RANGE (

C) PACKAGE

CLOCK

SPEED

HI5728EVAL1 25 Evaluation Platform 125MHz

CLOCK

HI5728

DAC

EXTERNAL

REFERENCE

(OPTIONAL)

SMA7

SLEEP

REF SELECT

VME

64 or 96-PIN

CONNECTOR

I-CHANNEL 10 BITS

Q-CHANNEL 10 BITS

XFMR

IOUTA

IOUTB

QOUTB

QOUTA

IOUT

QOUT

ICLK

QCLK

ICLK

QCLK

SMA8

SMA9

RSET POT

R68

SMA5

SMA6

AVDD

Application Note February 2000

3-2

Functional Description

Overview

The evaluation board is conﬁgured to be interfaced using a

VME connector. The data input lines are tied together using

small, zero ohm resistors on the back side of the board (QD0

is tied to ID0, continued with QD9 connected to ID9; see the

schematic, R54, 58-60, 62-67). This is done so that the data

can be driven into both of the channels without having to

generate two patterns. This aids in simplifying the evaluation

of the part. If the user has the ability to generate dual

patterns during the evaluation process, these resistors must

be removed. Both series and parallel termination resistor

footprints are provided, so that the user may customize the

termination method. An internal voltage reference is

available, as well as a variable resistor for customizing the

output current. RF transformers are populated for taking

advantage of the complimentary current outputs. They can

be disabled from the circuit by removing several zero ohm

resistors if a simple load resistor output is desired.

Voltage Reference

The HI5728 has an internal voltage reference (1.16V typical)

with a

±60ppm/

C drift coefﬁcient over the full temperature

range of the converter. The REFLO pin (15) selects the

reference. Access to pin 15 is provided through the center

pin of Jumper J2. To enable the internal reference, it is

necessary that the jumper be placed such that pin 15 is

grounded (J2 is labeled on the board as INT and EXT, for

internal and external). The REFIO pin (23) provides access

to the internal voltage reference, or can be overdriven if the

user wishes to use an external source for the reference.

Notice that a 0.1µF capacitor is placed as close as possible

to the REFIO pin. This capacitor is necessary for ensuring a

quiet reference voltage.

If the user wishes to use an external reference voltage,

jumper J3 must be in place and an external voltage

reference provided via SMA7, labeled ‘EXT REF’. Jumper J2

must be changed so that pin 16 is tied high (the supply

voltage, which is the EXT position of J2) when using an

external reference. The recommended limits of the external

reference are between 15mV and 1.2V, which provides over

36dB of multiplying capability. Performance of the converter

can be expected to decline as the reference voltage is

reduced due to the reduction in LSB current size.

If the user wishes to amplitude modulate the reference, the

REFIO pin can be overdriven with a waveform. The input

multiplying bandwidth of the REFIO input is approximately

1.4MHz. It is necessary that the multiplying signal be DC

offset so that the minimum and maximum peaks of the signal

are above 0V and less than 1.2V. The output current of each

converter is a function of the voltage reference used and the

value of R

SET

(R68 or R35 on the schematic). R68 is a

potentiometer that can be used to vary the R

SET

if the user

wishes to explore various output current levels. The board is

shipped with R68 set to ~2kΩ. The converter’s performance

sometimes improves with reduced output current. R35 is

provided if the user wishes to set the output current using a

set value. See the ‘Outputs’ section for more information on

setting the output current.

The footprints for SMA10 and SMA11 were provided on the

evaluation board so that separate multiplying signals could

be attached, along with alternate op amps, to overdrive the

internal reference op amps via ICOMP1 and QCOMP1 to

increase the multiplying bandwidth of the references for

DACs I and Q independently. SMA11 was placed next to

prototyping area so that an external op amp could be placed

between E11 and E7, which provides access to QCOMP1

via a zero ohm resistor, R69. It was intended that this

capability also exist between E10 and E6 for access to

ICOMP1 so that it could be driven independently if desired,

but E6 was mistakenly grounded. So the ability to overdrive

ICOMP1 and QCOMP1 exists on this board, but it must be

done with a single op amp and signal simultaneously via

SMA11, E7, and E11. ICOMP1 cannot be driven

independently using SMA10, E6, and E10. R56 should never

be populated. See the functional block diagram of the

HI5728 in the data sheet and the evaluation board schematic

located in this document for more information.

Outputs

The output current of the device is set by choosing R

SET

and V

FSADJ

such that the resultant of the following equation

is less than 20mA:

OUT

= 32 x V

FSADJ

SET

For example, using the internal V

FSADJ

of 1.16V nominal

and an R

SET

(R35 on the schematic) value of 1.86kΩ results

in an I

OUT

of approximately 20mA (maximum allowed).

Choose the output loading so that the ‘Output Voltage

Compliance Range’ is not violated (-0.3 to 1.25V). If an

external V

REF

is chosen, it should not exceed +1.2V.

The output can be conﬁgured to drive a load resistor, a

transformer, an operational ampliﬁer, or any other type of

output conﬁguration so long as the output voltage

compliance range and the maximum output current is not

violated.

Load Resistor Output

If the user wishes to use only a load resistor and no

transformer, they should remove the zero ohm resistors that

connect the outputs to the transformers. These resistors are

R51, R57, R70, and R72. See the schematic for details. The

output voltage developed is simply a function of the output

current multiplied by the output load. Care should be taken

to ensure that this voltage does not violate the output

compliance range of -300mV to 1.25V.

Application Note 9827

3-3

Differential Output

The board is also conﬁgured with the following transformer

output which will result in an output voltage amplitude that is

twice that of I

OUT

x Req, where Req is the equivalent

resistive loading seen by the current outputs (~12.5Ω =

(50//50//25). The transformer used in this circuit is a Mini-

Circuits 1:1 RF Transformer, T1-1T. The impedance looking

back into the transformer from the 50Ω spectrum analyzer is

50Ω (100Ω/2), so proper termination is achieved and

reﬂections are minimized. The transformer beneﬁts the user

by reducing the even-order harmonics and therefore

increasing the SFDR (Spurious Free Dynamic Range). It can

be taken out of the output by removing the zero ohm

jumpers, R51, 57, 70, and 72. With the transformers

removed, SMAs 1-4 should be used to measure the output

voltages across the included 50Ω loads.

Sleep

The converter can be put into ‘sleep’ mode by connecting pin

8 to either of the converter’s supply voltages. For normal

operation, it is recommended that pin 8 be tied to ground.

However, the sleep pin does have an active pulldown

current, so the pin can be left disconnected. On the

evaluation board, jumper J1 is provided for controlling the

sleep pin. Remove the jumper from J1 for normal operation

and replace it for sleep mode.

Power Supply(ies) and Ground(s)

The user can operate from either a single supply or dual

supplies. The DAC is designed to function with the digital

and analog voltages at the same value or at different values.

The DAC can be driven with a 3 or 3.3V digital supply and a

5V analog supply. In compliance with the absolute maximum

ratings for the DAC listed in the datasheet, the digital input

voltages should not be more than DV

+ 0.3V. A single

power supply wire can be attached to either DV

DD1

, and then the DV

DD1

and AV

DD1

holes jumpered

together on the board using regular wire if a single supply is

desired. The board uses dual ground planes connected at a

single point near the converter (this is the recommended

conﬁguration). For dual supply mode, connect a power

supply wire to both AV

DD1

and DV

DD1

and ground wires to

DGND1 and AGND1 independently.

Clock Inputs

The elaborate nature of the clock input circuit (see the

schematic) achieves versatility. It provides the means to drive

both channels from a single clock via the VME connector, or to

drive each with separate clocks via SMAs 8 and 9. Notice that

the 0Ω resistors (R28, 29, 50 and 53) are used as jumpers to

enable the different clock sources without degrading signal

integrity, or they can be replaced by nominal value resistors if

series input termination(s) are desired on the clock(s).

Input Termination

For clock rates below 50MSPS, the method of input

termination on the data and clock lines could be open, 50Ω,

or nominal series, depending on the current drive available

from the digital source. The performance of the converter

should not vary greatly with the termination method for these

update rates. For clock rates above 50MSPS, it may be

necessary that 50Ω termination resistors be used on this

board to achieve optimum spectral purity. If the digital

pattern source cannot drive this load, it is recommended that

200Ω series resistors be used at high clock rates. The board

is shipped with 200Ω series resistors on the data and clock

lines. Notice that the PCB footprints are available on the

board for either termination technique. For high clock rates,

adjustment of the timing between the clock and the data may

be necessary for optimum performance. When implementing

the HI5728 onto a board that contains the digital data/clock

source in close proximity to the DAC, it is unlikely that any

termination resistors will be required.

Note that the board is also shipped with both input channels

tied together via 0Ω, 402 package resistors on the bottom of

the board. This is done so that both channels can be

evaluated from a single pattern generator. If 50Ω termination

is used while the channels are tied together, it should be

obvious that they are only needed on one channel, not both;

else you will be driving 25Ω.

Getting Started

A summary of the external supplies, equipment, and signal

sources needed to operate the board is given below:

1. +3V to +5V power supply(ies) for HI5728.

2. Data Generator capable of generating 10-bit patterns.

The HSP-EVAL with the HSP45116 NCOM daughter

board is an option (see ‘Learning Your Way Around’).

3. Clock source (usually part of the Data Generator).

4. Spectrum Analyzer or Oscilloscopefor viewing the output

of the converter.

Attach a +3V to +5V power supply to the evaluation board

connections labeled DV

DD1

and AV

DD1

. Connect the 10 input

bits from the data generator to the evaluation board, preferably

by using a male, 64 or 96-pin VME (Versa Module Eurocard)

connector that mates with the eval board. See the schematic for

the correct pin connections. The middle row of the VME is not

used, which is why either a 64 or 96-pin connector will work.

FIGURE 1.

PIN 17 (20)

PIN 16 (21)

100Ω

HI5728

50Ω

IOUTB (QOUTB)

IOUTA (QOUTA)

OUT

= (2 x I

OUT

x R

Application Note 9827

P1-P3 P4-P6 P7-P9 P10-P12

HI5728EVAL1

Mfr. #:

Buy HI5728EVAL1

Manufacturer:

Renesas / Intersil

Description:

Data Conversion IC Development Tools HI5728EVAL PLA TFORM FOR TQFP

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