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ADV3205JSTZ

P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21
ADV3205 Data Sheet
Rev. 0 | Page 6 of 20
ABSOLUTE MAXIMUM RATINGS
POWER DISSIPATION
Table 6.
Parameter Rating
Analog Supply Voltage (AV
CC
to AV
EE
) 12 V
Digital Supply Voltage (DV
CC
to DGND) 6 V
Ground Potential Difference (AGND to
DGND)
±0.5 V
Internal Power Dissipation
1
3.1 W
Analog Input Voltage
2
Maintain linear output
Digital Input Voltage DV
CC
Output Voltage (Disabled Output)
(AV
CC
− 1.5 V) to
(AV
EE
+ 1.5 V)
Output Short-Circuit Duration Momentary
Storage Temperature Range −65°C to +125°C
Lead Temperature (Soldering 10 sec) 300°C
Packaged in a 100-lead LQFP, the ADV3205 junction-to-ambient
thermal impedance (θ
JA
) is 40°C/W. For long-term reliability,
the maximum allowed junction temperature of the plastic
encapsulated die should not exceed 150°C. Temporarily
exceeding this limit may cause a shift in parametric performance
due to a change in the stresses exerted on the die by the package.
Exceeding a junction temperature of 175°C for an extended
period can result in device failure.
The maximum ADV3205 power dissipation occurs when all
outputs are enabled and driving loads. Supply current increases
approximately linearly with the number of outputs that are enabled.
Refer to the Theory of Operation section for more details regarding
power dissipation calculations. Figure 4 indicates the maximum
ADV3205 power dissipation as a function of ambient temperature.
1
Specification is for device in free air (T
A
= 25°C):
100-lead plastic LQFP: θ
JA
= 40°C/W.
2
To avoid differential input breakdown, in no case should one-half the output
voltage (1/2 V
OUT
) and any input voltage be greater than 10 V potential
differential. See the output voltage swing parameter in Table 1 for the linear
output range.
T
J
= 150°C
AMBIENT TEMPERATURE (°C)
MAXIMUM POWER (W)
4.0
3.5
3.0
2.5
2.0
100 20304050607
10342-004
0
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Figure 4. Maximum Power Dissipation vs. Ambient Temperature
ESD CAUTION
Data Sheet ADV3205
Rev. 0 | Page 7 of 20
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
10342-006
NC = NO CONNECT
RESET
CE
DATA OUT
CLK
DATA IN
UPDATE
SER/PAR
NC
NC
NC
NC
NC
NC
NC
NC
NC
A0
A1
A2
A3
D0
D1
D2
D3
D4
26
AV
CC
13/14
27
OUT13
28
AV
EE
12/13
29
OUT12
30
AV
CC
11/12
31
OUT11
32
AV
EE
10/11
33
OUT10
34
AV
CC
09/10
35
OUT09
36
AV
EE
08/09
37
OUT08
38
AV
CC
07/08
39
OUT07
2
DGND
3
AGND
4
IN08
7
AGND
6
IN09
5
AGND
1
DV
CC
8
IN10
9
AGND
10
IN11
12
IN12
13
AGND
14
IN13
15
AGND
16
IN14
17
AGND
18
IN15
19
AGND
20
AV
EE
21
AV
CC
22
AV
CC
15
23
OUT15
24
AV
EE
14/15
25
OUT14
11
AGND
74
DGND
DV
CC
73
AGND
72
IN07
69
AGND
70
IN06
71
AGND
75
68
IN05
67
AGND
66
IN04
64
IN03
63
AGND
62
IN02
61
AGND
60
IN01
59
AGND
58
IN00
57
AGND
56
AV
EE
55
AV
CC
54
AV
CC
00
53
OUT00
52
AV
EE
00/01
51
OUT01
65
AGND
40
AV
EE
06/07
41
OUT06
42
AV
CC
05/06
43
OUT05
44
AV
EE
04/05
45
OUT04
46
AV
CC
03/04
47
OUT03
48
AV
EE
02/03
49
OUT02
50
AV
CC
01/02
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
PIN 1
ADV3205
TOP VIEW
(Not to Scale)
Figure 5. Pin Configuration
Table 7. Pin Function Descriptions
Pin Number Mnemonic Description
1, 75 DV
CC
5 V for Digital Circuitry.
2, 74 DGND Ground for Digital Circuitry.
3, 5, 7, 9, 11, 13, 15, 17, 19, 57,
59, 61, 63, 65, 67, 69, 71, 73
AGND Analog Ground for Inputs and Switch Matrix.
4, 6, 8, 10, 12, 14, 16, 18, 58, 60,
62, 64, 66, 68, 70, 72
INxx Analog Inputs; xx = Channel Number 00 through Channel Number 15.
20, 56 AV
EE
−5 V for Inputs and Switch Matrix.
21, 55 AV
CC
5 V for Inputs and Switch Matrix.
22, 54 AV
CC
xx 5 V for Output Amplifier that is used by Channel Number xx.
26, 30, 34, 38, 42, 46, 50 AV
CC
xx/yy 5 V for Output Amplifier that is shared by Channel Number xx and Channel Number yy.
23, 25, 27, 29, 31, 33, 35, 37,
39, 41, 43, 45, 47, 49, 51, 53
OUTyy Analog Outputs; yy = Channel Number 00 Through Channel Number 15.
24, 28, 32, 36, 40, 44, 48, 52 AV
EE
xx/yy −5 V for Output Amplifier that is shared by Channel Number xx and Channel Number yy.
76 D4 Parallel Data Input, TTL Compatible (Output Enable).
77 D3 Parallel Data Input, TTL Compatible (Input Select MSB).
78 D2 Parallel Data Input, TTL Compatible (Input Select).
79 D1 Parallel Data Input, TTL Compatible (Input Select).
ADV3205 Data Sheet
Rev. 0 | Page 8 of 20
Pin Number Mnemonic Description
80 D0 Parallel Data Input, TTL Compatible (Input Select LSB).
81 A3 Parallel Data Input, TTL Compatible (Output Select MSB).
82 A2 Parallel Data Input, TTL Compatible (Output Select).
83 A1 Parallel Data Input, TTL Compatible (Output Select).
84 A0 Parallel Data Input, TTL Compatible (Output Select LSB).
85 to 93 NC No Connect. Do not connect to this pin.
94
SER
/PAR
Selects Serial Data Mode, Low or Parallel Data Mode, High.
95
UPDATE
Enable (Transparent) Low. Allows serial register to connect directly to switch matrix.
Data latched when high.
96 DATA IN Serial Data Input, TTL Compatible.
97 CLK Clock, TTL Compatible. Falling edge triggered.
98 DATA OUT Serial Data Out, TTL Compatible.
99
CE
Chip Enable, Enable Low. Must be low to clock in and latch data.
100
RESET
Disable Outputs, Active Low.
P1-P3P4-P6P7-P9P10-P12P13-P15P16-P18P19-P21

ADV3205JSTZ

Mfr. #:
Buy ADV3205JSTZ
Manufacturer:
Analog Devices Inc.
Description:
Analog & Digital Crosspoint ICs 60MHz 16 x 16 Buffered
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