LOW SKEW, ÷1, ÷2
LVCMOS/LVTTL CLOCK GENERATOR
8701 DATA SHEET
6 REVISION F 1/21/15
TABLE 5B. AC CHARACTERISTICS, V
DD
= 3.3V±5%, V
DDO
= 2.5V±5%, TA = 0°C TO 70°C
TABLE 5A. AC CHARACTERISTICS, V
DD
= V
DDO
= 3.3V±5%, TA =0°C TO 70°C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 250 MHz
t
PD
Propagation Delay; NOTE 1
f ≤ 200MHz
2.2 3.4 ns
tsk(b) Bank Skew; NOTE 2, 7 Measured on rising edge atV
DDO
/2 200 ps
tsk(o) Output Skew; NOTE 3, 7 Measured on rising edge atV
DDO
/2 250 ps
tsk(w)
Multiple Frequency Skew;
NOTE 4, 7
Measured on rising edge atV
DDO
/2 300 ps
tsk(pp) Part-to-Part Skew; NOTE 5, 7 Measured on rising edge atV
DDO
/2 600 ps
t
R
Output Rise Time; NOTE 6 30% to 70% 280 850 ps
t
F
Output Fall Time; NOTE 6 30% to 70% 280 850 ps
odc Output Duty Cycle
f ≤ 200MHz
tCYCLE/2
- 0.5
tCYCLE/2
tCYCLE/2
+ 0.5
ns
f = 200MHz 2 2.5 3 ns
t
EN
Output Enable Time;
NOTE 6
f = 10MHz 6 ns
t
DIS
Output Disable Time;
NOTE 6
f = 10MHz 6 ns
All parameters measured at 200MHz unless noted otherwise.
NOTE 1: Measured from the V
DD
/2 of the input to
V
DDO
/2 of the output.
NOTE 2: Defi ned as skew within a bank of outputs at the same supply voltages and with equal load conditions.
NOTE 3: Defi ned as skew between outputs at the same supply voltage and with equal load conditions.
Measured at V
DDO
/2.
NOTE 4: Defi ned as skew across banks of outputs operating at different frequency with the same supply voltages
and equal load conditions.
NOTE 5: Defi ned as skew between outputs on different devices operating at the same supply voltages and
with equal load conditions. Using the same type of inputs on each device, the outputs are measured at V
DDO
/2.
NOTE 6: These parameters are guaranteed by characterization. Not tested in production.
NOTE 7: This parameter is defi ned in accordance with JEDEC Standard 65.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
f
MAX
Output Frequency 250 MHz
t
PD
Propagation Delay; NOTE 1
f ≤ 200MHz
2.6 3.6 ns
tsk(b) Bank Skew; NOTE 2, 7 Measured on rising edge atV
DDO
/2 225 ps
tsk(o) Output Skew; NOTE 3, 7 Measured on rising edge atV
DDO
/2 250 ps
tsk(w)
Multiple Frequency Skew;
NOTE 4, 7
Measured on rising edge atV
DDO
/2 300 ps
tsk(pp) Part-to-Part Skew; NOTE 5, 7 Measured on rising edge atV
DDO
/2 600 ps
t
R
Output Rise Time; NOTE 6 30% to 70% 280 850 ps
t
F
Output Fall Time; NOTE 6 30% to 70% 280 850 ps
odc Output Duty Cycle
f ≤ 200MHz
tCYCLE/2
- 0.5
tCYCLE/2
tCYCLE/2
+ 0.5
ns
f = 200MHz 2 2.5 3 ns
t
EN
Output Enable Time;
NOTE 6
f = 10MHz 6 ns
t
DIS
Output Disable Time;
NOTE 6
f = 10MHz 6 ns
For notes, please see T5A above.
