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IDT72V51433/72V51443/72V51453 3.3V, MULTI-QUEUE FLOW-CONTROL DEVICES
(16 QUEUES) 18 BIT WIDE CONFIGURATION 589,824, 1,179,648 and 2,359,296 bits
COMMERCIAL AND INDUSTRIAL
TEMPERATURE RANGES
WCLK
Dn
Prev PAEn
RCLK
ESTR
RDADD
D5 Sect 2
101 xxxx1100 00100
D5Q4
t
AH
t
AS
t
AH
t
AS
1
t
SKEW3
Previous value loaded on to PAE bus
xxxx xxx0
D5 Sect 2
2
RADEN
t
QH
t
QS
t
STH
t
STS
t
PAE
5939 drw26
Device 5 PAE
t
RAE
*AA* *BB* *CC*
*DD*
*FF**EE*
t
RAE
D5 Qn Status
xxxx xxx0
D5 Sect 2
Bus PAEn
Previous value loaded on to PAE bus
D5 Sect 2
D5 Sect 2
t
PAEHZ
t
PAEZL
xxxx xxx1
xxxx xxx1
REN
t
ENH
t
ENS
Device 5 -Qn
Wy
D5 Q4
Wy+1
D5 Q4
Wy+3
D5 Q4
Wy+2
D5 Q4
Wa+1
D5 Qn
t
A
t
A
t
A
t
A
t
A
Wa
D5 Qn
t
DH
t
DS
WEN
WADEN
FSTR
t
AH
100 0100
t
AS
WRADD D5Q4
D3Q8
Wn
D5 Q4
Wn+1
D5Q4
Wx
D3 Q8
011 01000
D4 Sect 1
100 xxx0
*A* *B* *C* *D* *E* *F*
t
QH
t
QS
t
QH
t
QS
t
AH
t
AS
t
AH
t
AS
t
ENS
t
ENH
t
STH
t
STS
Device 5 PAEn
1
2
t
ENS
t
ENH
Wp+1
Wp
Writes to Previous Q
t
DH
t
DS
t
RAE
D5 Q4
status
Figure 24.
PAE
n - Direct Mode, Flag Operation
Cycle:
*A* Queue 4 of Device 5 is selected for write operations.
Word, Wp is written into the previously selected queue.
*AA* Queue 4 of Device 5 is selected for read operations.
A sector from another device has control of the PAEn bus.
The discrete PAE output of device 5 is currently in High-Impedance and the PAE active flag is controlled by the previously selected device.
*B* Word Wp+1 is written into the previously selected queue.
*BB* Word, Wa+1 is read from Qn of D5, due to FWFT operation.
*C* Word, Wn is written into the newly selected queue, Q4 of D5. This write will cause the PAE flag on the read port to go from LOW to HIGH (not almost empty) after time,
t
SKEW3 + RCLK + tRAE (if tSKEW3 is violated one extra RCLK cycle will be added.
*CC* Word, Wy from the newly selected queue, Q4 will be read out due to FWFT operation.
Sector 2 of Device 5 is selected on the PAEn bus. Q4 of device 5 will therefore have is PAE status output on PAE[0]. There is a single RCLK cycle latency before
the PAEn bus changes to the new selection.
*D* Queue 8 of Device 3 is selected for write operations.
Word Wn+1 is written into Q4 of D5.
*DD* The PAEn bus changes control to D5, the PAEn outputs of D5 go to Low-Impedance and sector 2 is placed onto the outputs. The device of the previously selected
sector now places its PAEn outputs into High-Impedance to prevent bus contention. Word, Wy+1 is read from Q4 of D5.
The discrete PAE flag will go HIGH to show that Q4 of D5 is not almost empty. Q4 of device 5 will have its PAE status output on PAE[0].
*E* No writes occur.
*EE* Word, Wy+2 is read from Q4 of D5.
*F* Sector 1 of device 4 is selected on the write port for the PAFn bus.
Word, Wx is written into Q8 of D3.
*FF* The PAEn bus updates to show that Q4 of D5 is almost empty based on the reading out of word, Wy+1.
The discrete PAE flag goes LOW to show that Q4 of D5 is almost empty based on the reading of Wy+1.
