10
FN6582.1
November 3, 2009
This method is not acceptable for the signal path inputs.
Adding a series resistor to the switch input defeats the
purpose of using a low r
ON
switch. Alternatively, connecting
external Schottky diodes from the V+ rail to the signal pins
will shunt the fault current through the Schottky diode
instead of through the internal ESD diodes, thereby
protecting the switch. These Schottky diodes must be sized
to handle the
expected fault current..
Power-Supply Considerations
The ISL54063 and ISL54064 construction is typical of most
single supply CMOS analog switches which have two supply
pins: V+ and GND. V+ and GND provide the CMOS switch
bias and sets their analog voltage limits. Unlike switches with
a 5.5V maximum supply voltage, the ISL54063 and
ISL54064 have a 6.5V maximum supply voltage providing
plenty of head room for the 10% tolerance of 5V supplies
due to overshoot and noise spikes.
The minimum recommended supply voltage is 1.8V. It is
important to note that the input signal range, switching times,
and ON-resistance degrade at lower supply voltages. Refer
to the “Electrical Specifications” tables, beginning on page 4,
and “Typical Performance Curves”, beginning on page 11,
for details.
V+ and GND also power the internal logic and level shifters.
The level shifters convert the input logic levels to V+ and
GND signals levels to drive the analog switch gate terminals.
A high frequency decoupling capacitor placed as close to the
V+ and GND pin as possible is recommended for proper
operation of the switch. A value of 0.1µF is highly
recommended.
Negative Signal Swing Capability
The ISL54063 and ISL54064 contains circuitry that allows
the analog switch signal to swing below ground. The device
has an analog signal range of 6.5V below V+ up to the V+
rail (see Figure 14) while maintaining low r
ON
performance.
For example, if V+ = 5V, then the analog input signal range is
from -1.5V to +5V. If V+ = 2.7V then the range is from -3.8V
to +2.7V.
Logic-Level Thresholds
This switch family is 1.8V CMOS compatible (0.45V V
OLMAX
and 1.35V V
OHMIN
) over a supply range of 1.8V to 3.3V
(see Figure 16). At 3.3V the V
IL
level is 0.5V maximum. This
is still below the 1.8V CMOS guaranteed low output
maximum level of 0.45V, but noise margin is reduced. At
3.3V the V
IH
level is 1.4V minimum. While this is above the
1.8V CMOS guaranteed high output minimum of 1.35V
under most operating conditions the switch will recognize
this as a valid logic high.
The digital input stages draw supply current whenever the
digital input voltage is not at one of the supply rails. Driving
the digital input signals from GND to V+ with a fast transition
time minimizes power dissipation. The ISL54063 and
ISL54064 have been designed to minimize the supply
current whenever the digital input voltage is not driven to the
supply rails (0V to V+). For example driving the device with
2.85V logic high while operating with a 4.2V supply the
device draws only 1µA of current.
High-Frequency Performance
In 50Ω systems, the ISL54063 and ISL54064 have an ON
switch -3dB bandwidth of 60MHz (see Figure 19). The
frequency response is very consistent over a wide V+ range,
and for varying analog signal levels.
An OFF switch acts like a capacitor across the open
terminals and AC couples higher frequencies, resulting in
signal feed-through from a switch’s input to its output.
Off-Isolation is the resistance to this feed-through. Crosstalk
indicates the amount of feed-through from one switch
channel to another switch channel. Figure 20 details the high
Off-Isolation and Crosstalk rejection provided by this part. At
100kHz, Off-Isolation is about 60dB in 50Ω systems,
decreasing approximately 20dB per decade as frequency
increases. At 1MHz, Crosstalk is about -75dB in 50Ω
systems, decreasing approximately 20dB per decade as
frequency increases.
Leakage Considerations
Reverse ESD protection diodes are internally connected
between each analog-signal pin, V+ and GND. One of these
diodes conducts if any analog signal exceeds the
recommended analog signal range.
Virtually all the analog switch leakage current comes from
the ESD diodes and reversed biased junctions in the switch
cell. Although the ESD diodes on a given signal pin are
identical and therefore fairly well balanced, they are reverse
biased differently. Each is biased to either the +Ring or -Ring
and the analog input signal. This means their leakages will
vary as the signal varies. The difference in the two diode
leakages to the +Ring or -Ring and the reverse biased
junctions at the internal switch cell constitutes the
analog-signal-path leakage current.
GND
V
COMx
V
NCx
V+
LOGIC
INPUTS
V
NOx
-RING
+RING
CLAMP
1kΩ
OR
FIGURE 8. OVERVOLTAGE PROTECTION
ISL54063, ISL54064
