4©2016 Integrated Device Technology, Inc January 26, 2016
874S02I Data Sheet
Table 3B. PLL Bypass Function Table
Inputs Outputs
PLL_SEL = 0
PLL Bypass Mode
SEL3 SEL2 SEL1 SEL0 Q/nQ
0z000 ÷4
0001 ÷4
0010 ÷4
0011 ÷8
0100 ÷8
0101 ÷8
0110 ÷16
0111 ÷16
1000 ÷32
1001 ÷64
1010 ÷2
1011 ÷2
1100 ÷4
1101 ÷1
1110 ÷2
1111 ÷1
5©2016 Integrated Device Technology, Inc January 26, 2016
874S02I Data Sheet
Absolute Maximum Ratings
NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device.
These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond
those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for
extended periods may affect product reliability.
DC Electrical Characteristics
Table 4A. LVDS Power Supply DC Characteristics, V
DD
= V
DDO
= 3.3V ± 5%, T
A
= -40°C to 85°C
Table 4B. LVCMOS/LVTTL DC Characteristics, V
DD
= V
DDO
= 3.3V ± 5%, T
A
= -40°C to 85°C
Item Rating
Supply Voltage, V
DD
4.6V
Inputs, V
I
-0.5V to V
DD
+ 0.5V
Outputs, I
O
(LVDS)
Continuous Current
Surge Current
10mA
15mA
Package Thermal Impedance,
JA
64.7°C/W (0 lfpm)
Storage Temperature, T
STG
-65C to 150C
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
DD
Core Supply Voltage 3.135 3.3 3.465 V
V
DDA
Analog Supply Voltage V
DD
– 0.20 3.3 V
DD
V
V
DDO
Output Supply Voltage 3.135 3.3 3.465 V
I
DD
Power Supply Current 97 mA
I
DDA
Analog Supply Current 20 mA
I
DDO
Output Supply Current 40 mA
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
IH
Input High Voltage 2.2 V
DD
+ 0.3 V
V
IL
Input Low Voltage -0.3 0.8 V
I
IH
Input High Current
MR, SEL[0:3] V
DD
= V
IN
= 3.465V 150 µA
PLL_SEL V
DD
= V
IN
= 3.465V 10 µA
I
IL
Input Low Current
MR, SEL[0:3] V
DD
= 3.465V, V
IN
= 0V -10 µA
PLL_SEL V
DD
= 3.465V, V
IN
= 0V -150 µA
6©2016 Integrated Device Technology, Inc January 26, 2016
874S02I Data Sheet
Table 4C. Differential DC Characteristics, V
DD
= V
DDO
= 3.3V ± 5%, T
A
= -40°C to 85°C
NOTE 1: V
IL
should not be less than -0.3V.
NOTE 2: Common mode input voltage is defined as V
IH
.
Table 4D. LVDS DC Characteristics, V
DD
= V
DDO
= 3.3V ± 5%, T
A
= -40°C to 85°C
Table 5. Input Frequency Characteristics, V
DD
= V
DDO
= 3.3V ± 5%, T
A
= -40°C to 85°C
Table 6. AC Characteristics, V
DD
= V
DDO
= 3.3V ± 5%, T
A
= -40°C to 85°C
NOTE: Electrical parameters are guaranteed over the specified ambient operating temperature range, which is established when device
is mounted in a test socket with maintained transverse airflow greater than 500 lfpm. Device will meet specifications after thermal
equilibrium has been reached under these conditions.
NOTE 1: Defined as the time difference between the input reference clock and the average feedback input signal, when the PLL is locked
and the input reference frequency is stable.
NOTE 2: This parameter is defined in accordance with JEDEC Standard 65.
Symbol Parameter Test Conditions Minimum Typical Maximum Units
I
IH
Input High Current
CLK, FB_IN V
DD
= V
IN
= 3.465V 150 µA
nCLK, nFB_IN V
DD
= V
IN
= 3.465V 10 µA
I
IL
Input Low Current
CLK, FB_IN V
DD
= 3.465V, V
IN
= 0V -10 µA
nCLK, nFB_IN V
DD
= 3.465V, V
IN
= 0V -150 µA
V
PP
Peak-to-Peak Input Voltage; NOTE 1 0.15 1.3 V
V
CMR
Common Mode Input Voltage; NOTE 1, 2 GND + 0.5 V
DD
– 0.85 V
Symbol Parameter Test Conditions Minimum Typical Maximum Units
V
OD
Differential Output Voltage 350 450 550 mV
V
OD
V
OD
Magnitude Change 50 mV
V
OS
Offset Voltage 1.20 1.33 1.45 V
V
OS
V
OS
Magnitude Change 50 mV
Symbol Parameter Test Conditions Minimum Typical Maximum Units
F
IN
Input Frequency CLK/nCLK
PLL_SEL = 1 62.5 1000 MHz
PLL_SEL = 0 1000 MHz
Parameter Symbol Test Conditions Minimum Typical Maximum Units
f
OUT
Output Frequency 62.5 1000 MHz
tsk(Ø) Static Phase Offset; NOTE 1, 2 PLL_SEL = 1 -100 100 ps
tjit(cc) Cycle-to-Cycle Jitter; NOTE 2 35 ps
t
L
PLL Lock Time 1ms
t
R
/ t
F
Output Rise/Fall Time 20% to 80% 50 250 ps
odc Output Duty Cycle 47 53 %

874S02BMILF

Mfr. #:
Manufacturer:
IDT
Description:
Clock Generators & Support Products 1 LVDS OUT BUFFER
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
T/T Paypal Visa MoneyGram Western Union

Products related to this Datasheet