ISPLSI 2064VE-280LB100

13
Specifications ispLSI 2064VE
Signal Configuration
ispLSI 2064VE 100-Ball caBGA Signal Diagram (0.8mm Ball Pitch/10.0 x 10.0mm Body Size)
10 987654321
A
B
C
D
E
F
G
H
J
K
A
B
C
D
E
F
G
H
J
K
10 987654321
I/O
39
I/O
41
I/O
46
I/O
50
I/O
52
I/O
55
I/O
57
NC
1
NC
1
VCC
I/O
35
I/O
38
I/O
42
I/O
45
I/O
47
I/O
51
I/O
60
I/O
61
NC
1
NC
1
TCK/
IN 3
I/O
31
I/O
30
I/O
21
I/O
12
I/O
4
I/O
0
NC
1
GND NC
1
I/O
29
I/O
28
I/O
19
I/O
13
I/O
10
I/O
15
I/O
6
I/O
3
NC
1
NC
1
I/O
27
I/O
26
I/O
24
I/O
22
I/O
17
I/O
11
TMS/
IN 1
I/O
8
I/O
5
VCC
I/O
25
1
NCs are not to be connected to any active signals, VCC or GND.
Note: Ball A1 indicator dot on top side of package.
I/O
23
I/O
20
I/O
18
I/O
14
I/O
9
I/O
7
GND NC
1
NC
1
GOE
0
I/O
34
I/O
16
I/O
1
TDI/
IN 0
NC
1
GND
100-BGA/2064VE
VCC Y2 Y1
I/O
32
I/O
36
I/O
44
I/O
53
I/O
62
I/O
63
NC
1
NC
1
NC
1
RESET
I/O
33
I/O
48
I/O
2
GOE
1
NC
1
VCCY0NC
1
NC
1
BSCAN
I/O
37
I/O
40
I/O
43
I/O
54
I/O
49
TDO/
IN 2
I/O
56
I/O
58
I/O
59
GND
ispLSI 2064VE
Bottom View
14
Specifications ispLSI 2064VE
Pin Configuration
ispLSI 2064VE 100-Pin TQFP Pinout Diagram (0.5mm Lead Pitch/14.0 x 14.0mm Body Size)
I/O 57
I/O 58
I/O 59
1
NC
I/O 60
I/O 61
I/O 62
I/O 63
1
NC
Y0
RESET
VCC
GOE 1
GND
BSCAN
TDI/IN 0
I/O 0
I/O 1
I/O 2
I/O 3
1
NC
I/O 4
I/O 5
I/O 6
1
NC
NC
1
I/O 38
I/O 37
I/O 36
NC
1
I/O 35
I/O 34
I/O 33
I/O 32
NC
1
Y1
NC
1
VCC
GOE 0
GND
Y2
TCK/IN 3
I/O 31
I/O 30
I/O 29
I/O 28
NC
1
I/O 27
I/O 26
I/O 25
NC
1
I/O 56
I/O 55
I/O 54
I/O 53
I/O 52
NC
1
I/O 51
I/O 50
I/O 49
I/O 48
VCC
NC
1
TDO/IN 2
GND
I/O 47
I/O 46
I/O 45
I/O 44
NC
1
I/O 43
I/O 42
I/O 41
I/O 40
I/O 39
I/O 7
I/O 8
I/O 9
I/O 10
I/O 11
1
NC
I/O 12
I/O 13
I/O 14
I/O 15
VCC
TMS/IN 1
1
NC
GND
I/O 16
I/O 17
I/O 18
I/O 19
1
NC
I/O 20
I/O 21
I/O 22
I/O 23
I/O 24
1
NC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
57
56
55
54
53
52
51
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
100
99
98
97
96
95
94
93
92
91
90
89
88
87
86
85
84
83
82
81
80
79
78
77
76
58
ispLSI 2064VE
Top View
1. NC pins are not to be connected to any active signals, VCC or GND.
100 TQFP/2064VE
15
Specifications ispLSI 2064VE
Pin Configuration
ispLSI 2064VE 44-Pin PLCC Pinout Diagram (0.05in Lead Pitch/0.65 x 0.65in Body Size)
I/O 18
I/O 17
I/O 16
TMS/IN 2
RESET/Y1
VCC
TCK/Y2
I/O 15
I/O 14
I/O 13
I/O 12
I/O 28
I/O 29
I/O 30
I/O 31
GOE1/Y0
VCC
BSCAN
TDI/IN 0
I/O 0
I/O 1
I/O 2
I/O 27
I/O 26
I/O 25
I/O 24
GOE 0/IN 3
GND
I/O 23
I/O 22
I/O 21
I/O 20
I/O 19
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
GND
TDO/IN 1
I/O 8
I/O 9
I/O 10
I/O 11
ispLSI 2064VE
Top View
1
2
3
4
6
5
7
8
9
10
11
33
32
31
30
29
28
27
26
25
24
23
44
12
43
13
42
14
41
15
40
16
39
17
38
18
37
19
36
20
35
21
34
22
44 TQFP/2064VE
I/O 18
I/O 17
I/O 16
TMS/IN 2
RESET/Y1
VCC
TCK/Y2
I/O 15
I/O 14
I/O 13
I/O 12
I/O 28
I/O 29
I/O 30
I/O 31
GOE1/Y0
VCC
BSCAN
TDI/IN 0
I/O 0
I/O 1
I/O 2
I/O 27
I/O 26
I/O 25
I/O 24
GOE 0/IN 3
GND
I/O 23
I/O 22
I/O 21
I/O 20
I/O 19
I/O 3
I/O 4
I/O 5
I/O 6
I/O 7
GND
TDO/IN 1
I/O 8
I/O 9
I/O 10
I/O 11
ispLSI 2064VE
Top View
7
8
9
10
12
11
13
14
15
16
17
39
38
37
36
35
34
33
32
31
30
29
6
18
5
19
4
20
3
21
2
22
1
23
44
24
43
25
42
26
41
27
40
28
44 PLCC/2064VE
Pin Configuration
ispLSI 2064VE 44-Pin TQFP Pinout Diagram (0.8mm Lead Pitch/10.0 x 10.0mm Body Size)

ISPLSI 2064VE-280LB100

Mfr. #:
Manufacturer:
Lattice
Description:
CPLD ispLSI® 2000VE Family 2K Gates 64 Macro Cells 280MHz 3.3V 100-Pin CABGA
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
Payment:
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