NB6L11MMNG

NB6L11M
http://onsemi.com
7
LVPECL
Driver
V
CC
V
EE
Z
O
= 50 W
V
th
= V
CC
2 V
Z
O
= 50 W
NB6L11M
D
50 W
50 W
D
V
EE
Figure 10. LVPECL Interface
LVDS
Driver
V
CC
GND
Z
O
= 50 W
Z
O
= 50 W
NB6L11M
50 W*
50 W*
GND
Figure 11. LVDS Interface
V
CC
V
CC
Figure 12. Standard 50 W Load CML Interface
Figure 13. CapacitorCoupled Differential Interface
(V
TD
/V
TD
Connected to V
REFAC
; V
REFAC
Bypassed to
Ground with 0.1 mF Capacitor)
Figure 14. CapacitorCoupled SingleEnded Interface
(V
T
/V
T
Connected to V
REFAC
; V
REFAC
Bypassed to
Ground with 0.1 mF Capacitor)
V
TD
V
TD
IN
IN
V
TD
V
TD
CML
Driver
V
CC
GND
Z
O
= 50 W
V
T
= V
T
= V
CC
Z
O
= 50 W
NB6L11M
50 W*
50 W*
GND
V
CC
IN
IN
V
TD
V
TD
V
CC
Differential
Driver
V
CC
GND
Z
O
= 50 W
V
th
= External V
REFAC
Z
O
= 50 W
NB6L11M
50 W*
50 W*
GND
V
CC
IN
IN
V
TD
V
TD
V
th
V
TD
V
TD
V
th
SingleEnded
Driver
V
CC
GND
Z
O
= 50 W
V
th
= External V
REFAC
NB6L11M
50 W*
50 W*
GND
V
CC
IN
IN
V
th
NB6L11M
http://onsemi.com
8
800
700
600
500
400
300
200
100
0
0123
f
out
, CLOCK OUTPUT FREQUENCY (GHz)
V
OUTPP
OUTPUT VOLTAGE AMPLITUDE (mV)
(TYPICAL)
Figure 15. Output Voltage Amplitude (V
OUTPP
) versus Output
Frequency at Ambient Temperature (Typical)
Q
Q
V
CC
16 mA
50 W50 W
Figure 16. CML Output Structure
V
EE
4
Driver
Device
Receiver
Device
QD
Figure 17. Typical CML Termination for Output Driver and Device Evaluation
Q D
V
CC
50 W50 W
Z = 50 W
Z = 50 W
DUT
ORDERING INFORMATION
Device Package Shipping
NB6L11MMNG QFN16
(PbFree)
123 Units / Rail
NB6L11MMNR2G QFN16
(PbFree)
3000 / Tape & Reel
For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
NB6L11M
http://onsemi.com
9
PACKAGE DIMENSIONS
16 PIN QFN
CASE 485G01
ISSUE D
16X
SEATING
PLANE
L
D
E
0.15 C
A
A1
e
D2
E2
b
1
4
58
12
9
16 13
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED
TERMINAL AND IS MEASURED BETWEEN
0.25 AND 0.30 MM FROM TERMINAL.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
5. L
max
CONDITION CAN NOT VIOLATE 0.2 MM
MINIMUM SPACING BETWEEN LEAD TIP
AND FLAG
B
A
0.15
C
TOP VIEW
SIDE VIEW
BOTTOM VIEW
PIN 1
LOCATION
0.10 C
0.08 C
(A3)
C
16 X
e
16X
NOTE 5
0.10 C
0.05
C
A B
NOTE 3
K
16X
DIM MIN MAX
MILLIMETERS
A 0.80 1.00
A1 0.00 0.05
A3 0.20 REF
b 0.18 0.30
D 3.00 BSC
D2 1.65 1.85
E 3.00 BSC
E2 1.65 1.85
e 0.50 BSC
K
L 0.30 0.50
EXPOSED PAD
0.18 TYP
L1
DETAIL A
L
ALTERNATE TERMINAL
CONSTRUCTIONS
A1
A3
L
DETAIL B
MOLD CMPDEXPOSED Cu
ALTERNATE
CONSTRUCTIONS
DETAIL A
DETAIL B
L1 0.00 0.15
ǒ
mm
inches
Ǔ
SCALE 10:1
0.50
0.02
0.575
0.022
1.50
0.059
3.25
0.128
0.30
0.012
3.25
0.128
0.30
0.012
EXPOSED PAD
*For additional information on our PbFree strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
SOLDERING FOOTPRINT*
ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice
to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability
arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages.
“Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All
operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights
nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications
intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should
Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates,
and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death
associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal
Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
N. American Technical Support: 8002829855 Toll Free
USA/Canada
Japan: ON Semiconductor, Japan Customer Focus Center
291 Kamimeguro, Meguroku, Tokyo, Japan 1530051
Phone: 81357733850
NB6L11M/D
The products described herein (NB4L16M), may be covered by U.S. patents including 6,362,644. There may be other patents pending.
ECLinPS MAX is a trademark of Semiconductor Components Industries, LLC (SCILLC).
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 3036752175 or 8003443860 Toll Free USA/Canada
Fax: 3036752176 or 8003443867 Toll Free USA/Canada
Email: orderlit@onsemi.com
ON Semiconductor Website: http://onsemi.com
Order Literature: http://www.onsemi.com/litorder
For additional information, please contact your
local Sales Representative.

NB6L11MMNG

Mfr. #:
Manufacturer:
ON Semiconductor
Description:
Clock Buffer 1:2 CML FANOUT
Lifecycle:
New from this manufacturer.
Delivery:
DHL FedEx Ups TNT EMS
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